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放大器
全差分放大器

THS4505

現行

寬頻、低失真、全差動放大器

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產品規格表

THS4505

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 BW at Acl (MHz) 260 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 1800 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 8 Iq per channel (typ) (mA) 16 Rail-to-rail In to V- Vos (offset voltage at 25°C) (max) (mV) 7 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 130 2nd harmonic (dBc) 79 3rd harmonic (dBc) 93 Frequency of harmonic distortion measurement (MHz) 8 GBW (typ) (MHz) 210 Input bias current (max) (pA) 4600000 CMRR (typ) (dB) 80 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 BW at Acl (MHz) 260 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 1800 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 8 Iq per channel (typ) (mA) 16 Rail-to-rail In to V- Vos (offset voltage at 25°C) (max) (mV) 7 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 130 2nd harmonic (dBc) 79 3rd harmonic (dBc) 93 Frequency of harmonic distortion measurement (MHz) 8 GBW (typ) (MHz) 210 Input bias current (max) (pA) 4600000 CMRR (typ) (dB) 80 Rating Catalog
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Fully Differential Architecture
  • Bandwidth: 260 MHz
  • Slew Rate: 1800 V/µs
  • IMD3: -73 dBc at 30 MHz
  • OIP3: 29 dBm at 30 MHz
  • Output Common-Mode Control
  • Wide Power-Supply Voltage Range: 5 V, ±5 V, 12 V, 15 V
  • Input Common-Mode Range Shifted to Include the Negative Power-Supply Rail
  • Power-Down Capability (THS4504)
  • Evaluation Module Available
  • APPLICATIONS
    • High Linearity Analog-to-Digital Converter Preamplifier
    • Wireless Communication Receiver Chains
    • Single-Ended to Differential Conversion
    • Differential Line Driver
    • Active Filtering of Differential Signals

PowerPAD is a trademark of Texas Instruments, Incorporated.
All other trademarks are the property of their respective owners
  • Fully Differential Architecture
  • Bandwidth: 260 MHz
  • Slew Rate: 1800 V/µs
  • IMD3: -73 dBc at 30 MHz
  • OIP3: 29 dBm at 30 MHz
  • Output Common-Mode Control
  • Wide Power-Supply Voltage Range: 5 V, ±5 V, 12 V, 15 V
  • Input Common-Mode Range Shifted to Include the Negative Power-Supply Rail
  • Power-Down Capability (THS4504)
  • Evaluation Module Available
  • APPLICATIONS
    • High Linearity Analog-to-Digital Converter Preamplifier
    • Wireless Communication Receiver Chains
    • Single-Ended to Differential Conversion
    • Differential Line Driver
    • Active Filtering of Differential Signals

PowerPAD is a trademark of Texas Instruments, Incorporated.
All other trademarks are the property of their respective owners

The THS4504 and THS4505 are high-performance, fully differential amplifiers from Texas Instruments. The THS4504, featuring power-down capability, and the THS4505, without power-down capability, set new performance standards for fully differential amplifiers with unsurpassed linearity, supporting 12-bit operation through 40 MHz. Package options include the SOIC-8 and the MSOP-8 with PowerPAD for a smaller footprint, enhanced ac performance, and improved thermal dissipation capability.

The THS4504 and THS4505 are high-performance, fully differential amplifiers from Texas Instruments. The THS4504, featuring power-down capability, and the THS4505, without power-down capability, set new performance standards for fully differential amplifiers with unsurpassed linearity, supporting 12-bit operation through 40 MHz. Package options include the SOIC-8 and the MSOP-8 with PowerPAD for a smaller footprint, enhanced ac performance, and improved thermal dissipation capability.
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技術文件

star =TI 所選的此產品重要文件
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重要文件 類型 標題 格式選項 日期
* Data sheet Wideband, Low-Distortion, Fully Differential Amplifiers datasheet (Rev. D) 2008年 5月 15日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

THS4505 PSpice Model (Rev. B)

SLOJ167B.ZIP (40 KB) - PSpice Model
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模擬型號

THS4505 TINA-TI Reference Design (Rev. B)

SLAC097B.TSC (105 KB) - TINA-TI Reference Design
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模擬型號

THS4505 TINA-TI Spice Model (Rev. B)

SLAM026B.ZIP (5 KB) - TINA-TI Spice Model
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計算工具

SBOR022 — TI FDA Calculator

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
View Options
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HVSSOP (DGN) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
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