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Real-time digital power MCUs

TMS320R2811

現行

具有 150 MHz、40 KB RAM 的 C2000 ™ 32 位元無線微控制器

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TMS320R2811

現行
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產品詳細資料

CPU 1 C28 Frequency (MHz) 150 Flash memory (kByte) 0 RAM (kByte) 40 ADC type 1 pipeline Total processing (MIPS) 150 Features 2-pin oscillator, 32-bit CPU timers, External memory interface, McBSP, Watchdog timer UART 2 CAN (#) 1 Sigma-delta filter 8 PWM (Ch) 16 Number of ADC channels 16 Direct memory access (Ch) 0 SPI 1 QEP 2 USB No Hardware accelerators CPU only Edge AI enabled Yes Operating temperature range (°C) -40 to 85 Rating Catalog Communication interface CAN, McBSP, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 0 Number of GPIOs 56 Number of I2Cs 0
CPU 1 C28 Frequency (MHz) 150 Flash memory (kByte) 0 RAM (kByte) 40 ADC type 1 pipeline Total processing (MIPS) 150 Features 2-pin oscillator, 32-bit CPU timers, External memory interface, McBSP, Watchdog timer UART 2 CAN (#) 1 Sigma-delta filter 8 PWM (Ch) 16 Number of ADC channels 16 Direct memory access (Ch) 0 SPI 1 QEP 2 USB No Hardware accelerators CPU only Edge AI enabled Yes Operating temperature range (°C) -40 to 85 Rating Catalog Communication interface CAN, McBSP, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 0 Number of GPIOs 56 Number of I2Cs 0
LQFP (PBK) 128 256 mm² 16 x 16
  • High-Performance Static CMOS Technology
    • 150 MHz (6.67-ns Cycle Time)
    • Low-Power (1.8-V Core @135 MHz, 1.9-V Core @150 MHz, 3.3-V I/O) Design
  • JTAG Boundary Scan Support
  • High-Performance 32-Bit CPU (TMS320C28x)
    • 16 x 16 and 32 x 32 MAC Operations
    • 16 x 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program/Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • Code and Pin Compatible to F2810, F2811, and F2812 devices
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • 20K x 16 Total Single-Access RAM (SARAM)
      • L0 and L1: 2 Blocks of 4K x 16 Each SARAM
      • L2 and L3: 2 Blocks of 1K X 16 SARAM
      • H0: 1 Block of 8K x 16 SARAM
      • M0 and M1: 2 Blocks of 1K x 16 Each SARAM
  • SPI, SCI, and GPIO Boot Loader Modes to Support Loading Code From Off-chip Sources to On-chip RAM. SPI Boot Mode Supports Loading From an External Serial EEPROM.
  • Boot ROM (4K x 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface (2812)
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • Three 32-Bit CPU-Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Enhanced Controller Area Network (eCAN)
    • Multichannel Buffered Serial Port (McBSP)
  • 12-Bit ADC, 16 Channels
    • 2 x 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 General Purpose I/O (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Code Composer Studio™ IDE
    • DSP/BIOS™
    • JTAG Scan Controllers
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • Package Options
    • 179-Ball MicroStar BGA™ With External Memory Interface (GHH), (ZHH) (2812)
    • 176-Pin Low-Profile Quad Flatpack (LQFP) With External Memory Interface (PGF) (2812)
    • 128-Pin LQFP Without External Memory Interface (PBK) (2811)
  • Temperature Options:
    • A: –40°C to 85°C (GHH, ZHH, PGF, PBK)
    • S: –40°C to 125°C (GHH, ZHH, PGF, PBK)
    • Q: -40°C to 125°C (PGF, PBK)

TMS320C24x, Code Composer Studio, DSP/BIOS, and MicroStar BGA are trademarks of Texas Instruments.
IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
TMS320C28x is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
  • High-Performance Static CMOS Technology
    • 150 MHz (6.67-ns Cycle Time)
    • Low-Power (1.8-V Core @135 MHz, 1.9-V Core @150 MHz, 3.3-V I/O) Design
  • JTAG Boundary Scan Support
  • High-Performance 32-Bit CPU (TMS320C28x)
    • 16 x 16 and 32 x 32 MAC Operations
    • 16 x 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program/Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • Code and Pin Compatible to F2810, F2811, and F2812 devices
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • 20K x 16 Total Single-Access RAM (SARAM)
      • L0 and L1: 2 Blocks of 4K x 16 Each SARAM
      • L2 and L3: 2 Blocks of 1K X 16 SARAM
      • H0: 1 Block of 8K x 16 SARAM
      • M0 and M1: 2 Blocks of 1K x 16 Each SARAM
  • SPI, SCI, and GPIO Boot Loader Modes to Support Loading Code From Off-chip Sources to On-chip RAM. SPI Boot Mode Supports Loading From an External Serial EEPROM.
  • Boot ROM (4K x 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface (2812)
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • Three 32-Bit CPU-Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Enhanced Controller Area Network (eCAN)
    • Multichannel Buffered Serial Port (McBSP)
  • 12-Bit ADC, 16 Channels
    • 2 x 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 General Purpose I/O (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Code Composer Studio™ IDE
    • DSP/BIOS™
    • JTAG Scan Controllers
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • Package Options
    • 179-Ball MicroStar BGA™ With External Memory Interface (GHH), (ZHH) (2812)
    • 176-Pin Low-Profile Quad Flatpack (LQFP) With External Memory Interface (PGF) (2812)
    • 128-Pin LQFP Without External Memory Interface (PBK) (2811)
  • Temperature Options:
    • A: –40°C to 85°C (GHH, ZHH, PGF, PBK)
    • S: –40°C to 125°C (GHH, ZHH, PGF, PBK)
    • Q: -40°C to 125°C (PGF, PBK)

TMS320C24x, Code Composer Studio, DSP/BIOS, and MicroStar BGA are trademarks of Texas Instruments.
IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
TMS320C28x is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.

The TMS320R2811 and TMS320R2812 devices, members of the TMS320C28x™ DSP generation, are highly integrated, high-performance solutions for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document, TMS320R2811 and TMS320R2812 are abbreviated as R2811 and R2812, respectively.

The TMS320R2811 and TMS320R2812 devices, members of the TMS320C28x™ DSP generation, are highly integrated, high-performance solutions for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document, TMS320R2811 and TMS320R2812 are abbreviated as R2811 and R2812, respectively.
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重要文件 類型 標題 格式選項 日期
* Data sheet TMS320R2811, TMS320R2812 Digital Signal Processors datasheet (Rev. C) 2006年 6月 26日
* Errata TMS320R2811 and TMS320R2812 Digital Signal Processors Silicon Errata (Rev. E) 2016年 9月 28日
User guide C2000 Real-Time Control Peripheral Reference Guide (Rev. U) PDF | HTML 2025年 7月 11日
Application note EEPROM Emulation for Gen 2 C2000 Real-Time MCUs (Rev. A) 2020年 7月 23日
Application note Programming TMS320x28xx and 28xxx Peripherals in C/C++ (Rev. E) PDF | HTML 2017年 12月 19日
Application note C2000™ MISRA-C Policy 2017年 9月 26日
Application note Programming Examples for the TMS320x28xx eCAN (Rev. B) PDF | HTML 2017年 9月 12日
Application note Calculating FIT for a Mission Profile 2015年 3月 24日
User guide TMS320x281x System Control and Interrupts Reference Guide (Rev. G) 2012年 8月 20日
User guide TMS320x281x Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. D) 2011年 8月 29日
Application note Programming External Nonvolatile Memory Using SDFlash for TMS320C28x Devices 2009年 11月 16日
User guide TMS320x281x Serial Communications Interface (SCI) Reference Guide (Rev. D) 2009年 7月 7日
Application note Common Object File Format (COFF) 2009年 4月 15日
Application note Migrating from TMS320x2833x/2823x to TMS320x2834x 2009年 3月 3日
User guide TMS320x281x Serial Peripheral Interface (SPI)Reference Guide (Rev. E) 2009年 2月 6日
User guide TMS320x280x, 2801x, 2804x Serial Peripheral Interface (SPI) Reference Guide 2009年 2月 5日
User guide TMS320x280x, 2801x DSP Enhanced Controller Area Network (eCAN) User's Guide 2009年 1月 22日
User guide TMS320x281x Enhanced Controller Area Network (eCAN) Reference Guide (Rev. F) 2009年 1月 22日
Application note Flash Programming Solutions for the TMS320F28xxx DSCs 2008年 8月 19日
Application note An Overview of Designing Analog Interface With TM320F28xx/28xxx DSCs (Rev. A) 2008年 5月 14日
Application note Microstepping Bipolar Drive of Two-Phase Hybrid Stepping Motor on F2808 DSP 2008年 5月 2日
Application note TMS320F281x Boot ROM Serial Flash Programming 2007年 10月 11日
Application note Interfacing SD/MMC Cards With TMS320F28xxx DSCs 2007年 7月 26日
User guide TMS320x281x Event Manager Reference Guide (Rev. E) 2007年 6月 27日
Application note Using Enhanced Pulse Width Modulator (ePWM) Module for 0-100% Duty Cycle Control 2006年 12月 20日
User guide TMS320x281x Boot ROM Reference Guide (Rev. C) 2006年 12月 4日
Application note Using the eQEP Module in TMS320x280x as a Dedicated Capture 2006年 11月 30日
Application note Migrating from TMS320x281x to TMS320x280x/2801x/2804x (Rev. A) 2006年 10月 5日
Application note Online Stack Overflow Detection on the TMS320C28x DSP 2003年 5月 2日

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The Solution Adapter is one of several tools included in the powerSUITE Digital Power Supply Design Software Tools for C2000™ Microcontrollers.  The Solution Adapter allows you to modify existing code examples from TI digital power kits and configure them to run on a custom digital power (...)
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