TPS74301

現行

具 PG 的 1.5-A、低 VIN (0.8-V)、高精度、可調式超低壓降電壓穩壓器

產品詳細資料

Rating Catalog Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 1.5 Output options Adjustable Output, Tracking Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 PSRR at 100 KHz (dB) 45 Iq (typ) (mA) 3 Features Enable, Power good Thermal resistance θJA (°C/W) 20 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 55 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 1.5 Output options Adjustable Output, Tracking Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 PSRR at 100 KHz (dB) 45 Iq (typ) (mA) 3 Features Enable, Power good Thermal resistance θJA (°C/W) 20 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 55 Operating temperature range (°C) -40 to 125
VQFN (RGW) 20 25 mm² (5 mm × 5 mm) TO-263 (KTW) 7 153.924 mm² (10.1 mm × 15.24 mm)
  • Track Pin Allows for Flexible Power-Up Sequencing
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9V with External Bias Supply
  • Adjustable Output (0.8V to 3.6V)
  • Ultra-Low Dropout:
    • 55mV at 1.5A (typ)
  • Stable with any output capacitor ≥ 2.2µF (new chip)
  • Stable with any or no Output Capacitor (legacy chip)
  • Excellent Transient Response
  • Available in 5mm × 5mm × 1mm QFN and DDPAK-7 Packages
  • Open-Drain Power-Good
  • Active High Enable
  • Track Pin Allows for Flexible Power-Up Sequencing
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9V with External Bias Supply
  • Adjustable Output (0.8V to 3.6V)
  • Ultra-Low Dropout:
    • 55mV at 1.5A (typ)
  • Stable with any output capacitor ≥ 2.2µF (new chip)
  • Stable with any or no Output Capacitor (legacy chip)
  • Excellent Transient Response
  • Available in 5mm × 5mm × 1mm QFN and DDPAK-7 Packages
  • Open-Drain Power-Good
  • Active High Enable

The TPS743 low-dropout (LDO) linear regulator provides an easy-to-use robust power management design for a wide variety of applications. The TRACK pin allows the output to track an external supply. This feature is useful in minimizing the stress on ESD structures that are present between the CORE and I/O power pins of many processors. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 2.2µF. Each LDO is stable with low-cost ceramic output capacitors and the family is fully specified from –40°C to 125°C.

The TPS743 low-dropout (LDO) linear regulator provides an easy-to-use robust power management design for a wide variety of applications. The TRACK pin allows the output to track an external supply. This feature is useful in minimizing the stress on ESD structures that are present between the CORE and I/O power pins of many processors. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 2.2µF. Each LDO is stable with low-cost ceramic output capacitors and the family is fully specified from –40°C to 125°C.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TPS74301 1.5A Ultra-LDO With Programmable Sequencing datasheet (Rev. L) PDF | HTML 2024/12/9
應用說明 LDO Noise Demystified (Rev. B) PDF | HTML 2020/8/18
應用說明 A Topical Index of TI LDO Application Notes (Rev. F) 2019/6/27
選擇指南 Low Dropout Regulators Quick Reference Guide (Rev. P) 2018/3/21
應用說明 LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017/8/9
應用說明 Using New Thermal Metrics 2009/12/15
類比設計期刊 Simultaneous power-down sequencing with the TPS74x01 family of linear regulators 2007/8/10
類比設計期刊 Q3 2007 Issue Analog Applications Journal 2007/8/10
類比設計期刊 A 3-A, 1.2-Vout linear regulator with 80% efficiency and Plost < 1W 2006/10/10

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開發板

TPS74301EVM-118 — TPS74301 評估模組

The TPS74301EVM-118 evaluation module (EVM) is designed to help the user easily evaluate and test the operation and functionality of the TPS74301 LDO linear regulator. The EVM uses the TPS74301, 1.5 A linear regulator with tracking and integrated power good (PG). Refer to the (...)

使用指南: PDF
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模擬型號

TPS74301 PSpice Transient Model (Rev. B)

SLIM015B.ZIP (62 KB) - PSpice 模型
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TPS74301 TINA-TI Transient Reference Design

SLIM287.TSC (105 KB) - TINA-TI 參考設計
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TPS74301 TINA-TI Transient Spice Model

SLIM286.ZIP (36 KB) - TINA-TI Spice 模型
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TPS74301 Unencrypted PSpice Transient Model

SBVM635.ZIP (2 KB) - PSpice 模型
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGW) 20 Ultra Librarian
TO-263 (KTW) 7 Ultra Librarian

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