首頁 介面 USB IC USB PHY 和橋接器

TUSB1210

現行

高速 480-Mbps USB 2.0 OTG 收發器

產品詳細資料

Type Transceiver Function USB2 USB speed (bps) 480000000 Alternate mode No Rating Catalog Operating temperature range (°C) -40 to 85
Type Transceiver Function USB2 USB speed (bps) 480000000 Alternate mode No Rating Catalog Operating temperature range (°C) -40 to 85
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • USB2.0 PHY transceiver chip, designed to interface with a USB controller through a ULPI interface, fully compliant with:
    • Universal serial bus specification Rev. 2.0
    • On-the-go supplement to the USB 2.0 specification Rev. 1.3
    • UTMI+ low pin interface (ULPI) specification Rev. 1.1
    • ULPI 12-pin SDR interface
  • DP/DM line external component compensation (patent #US7965100 B1)
  • Interfaces to host, peripheral and OTG device cores; optimized for portable devices or system ASICs with built-in USB OTG device core
  • Complete USB OTG physical front-end that supports host negotiation protocol (HNP) and session request protocol (SRP)
  • VBUS overvoltage protection circuitry protects VBUS pin in range –2 V to 20 V
  • Internal 5-V short-circuit protection of DP, DM, and ID pins for cable shorting to VBUS pin
  • ULPI interface:
    • I/O interface (1.8 V) optimized for nonterminated 50 Ω line impedance
    • ULPI CLOCK pin (60 MHz) supports input and output clock configurations
    • Fully programmable ULPI-compliant register set
  • Full industrial grade operating temperature range from –40°C to 85°C
  • Available in a 32-pin quad flat no lead [QFN (RHB)] package
  • USB2.0 PHY transceiver chip, designed to interface with a USB controller through a ULPI interface, fully compliant with:
    • Universal serial bus specification Rev. 2.0
    • On-the-go supplement to the USB 2.0 specification Rev. 1.3
    • UTMI+ low pin interface (ULPI) specification Rev. 1.1
    • ULPI 12-pin SDR interface
  • DP/DM line external component compensation (patent #US7965100 B1)
  • Interfaces to host, peripheral and OTG device cores; optimized for portable devices or system ASICs with built-in USB OTG device core
  • Complete USB OTG physical front-end that supports host negotiation protocol (HNP) and session request protocol (SRP)
  • VBUS overvoltage protection circuitry protects VBUS pin in range –2 V to 20 V
  • Internal 5-V short-circuit protection of DP, DM, and ID pins for cable shorting to VBUS pin
  • ULPI interface:
    • I/O interface (1.8 V) optimized for nonterminated 50 Ω line impedance
    • ULPI CLOCK pin (60 MHz) supports input and output clock configurations
    • Fully programmable ULPI-compliant register set
  • Full industrial grade operating temperature range from –40°C to 85°C
  • Available in a 32-pin quad flat no lead [QFN (RHB)] package

The TUSB1210 is a USB2.0 transceiver chip, designed to interface with a USB controller through a ULPI interface. The device supports all USB2.0 data rates (high-speed 480 Mbps, full-speed 12 Mbps, and low-speed 1.5 Mbps), and is compliant to both host and peripheral modes. The device additionally supports a UART mode and legacy ULPI serial modes. TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including HNP and SRP.

The DP/DM external component compensation in the transmitter compensates for variations in the series impendence in order to match with the data line impedance and the receiver input impedance, to limit data reflections and thereby improve eye diagrams.

The TUSB1210 is a USB2.0 transceiver chip, designed to interface with a USB controller through a ULPI interface. The device supports all USB2.0 data rates (high-speed 480 Mbps, full-speed 12 Mbps, and low-speed 1.5 Mbps), and is compliant to both host and peripheral modes. The device additionally supports a UART mode and legacy ULPI serial modes. TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including HNP and SRP.

The DP/DM external component compensation in the transmitter compensates for variations in the series impendence in order to match with the data line impedance and the receiver input impedance, to limit data reflections and thereby improve eye diagrams.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TUSB1210 Stand-Alone USB Transceiver Chip Silicon datasheet (Rev. J) PDF | HTML 2021/7/22
* 勘誤表 TUSB1210 Errata 2011/1/20
白皮書 A Primer on USB Type-C and Power Delivery Applications and Requirements (Rev. B) PDF | HTML 2022/3/25
應用說明 TUSB121x USB2.0 Board Guidelines 2011/10/13

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開發板

TUSB1210EVM — TUSB1210 DP/DM 線路外部元件補償、Vbus 過電壓保護電路 EVM

TUSB1210EVM 實作具有 ULPI 介面的 USB PHY。它可支援主機、裝置、OTG 模式,並在 ULPI 介面支援 +1.8V 的輸出電壓。此 EVM 還可以作為 TUSB1210 的實作硬體參考設計。
使用指南: PDF
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模擬型號

TUSB1210 IBIS Model

SLLM184.ZIP (147 KB) - IBIS 模型
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian

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