12-Gbps Multi-Channel BERT Board Reference Design
TIDA-00426
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
See the Important Notice and Disclaimer covering reference designs and other TI resources.
Key Document
- 12-Gbps BERT Board Reference Design
(PDF 5775 KB)
16 May 2016
Description
This reference design is a 12-Gbps low-cost bit error tester (BERT) capable of generating and checking up to 8 channels of pseudo-random binary sequences (PRBS). This validated design is a convenient way to generate multi-channels high speed serial bit streams of up to 12-Gbps, and checking incoming serial bit streams for possble bit errors. This design can be used as a hand-held BERT useful for evaluating the signal integrity and bit error error performance of a high speed sub-system.
Features
- Eight Pattern Generation Channels
- Eight Pattern Checking Channels
- Optional External Reference Clock Inputs
- Onboard USB-to-I2C for Easy Device Programming
- Status Display LEDs
See the Important Notice and Disclaimer covering reference designs and other TI resources.
