SLASE67A January 2015 – August 2019 ADS54J54
PRODUCTION DATA.
The power down functions of the ADS54J54 can be controlled either through the parallel control pin (ENABLE) or through a SPI register setting. Power-down modes for the different channels as well as for the JESD204B interface are supported.
The ADS54J54 supports the following power-down modes. The analog sleep mode configurations are in register 0x05/06 and the JESD204b sleep mode configurations are in register 0x1E and 0x1F.
Configuration | Power Consumption | Wake-Up Time |
---|---|---|
Global power down | 24 mW | Needs JESD resynch |
Standby | 31 mW | Needs JESD resynch |
Deep sleep | 791 mW | 1.4 ms |
Light sleep | 1.68 W | 8 µs |
Control power-down function through ENABLE pin:
Control power-down function through SPI (ENABLE pin always high):