SNAS207B May   2004  – January 2024 LM64

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Operating Ratings
    3. 5.3 DC Electrical Characteristics
    4. 5.4 Operating Electrical Characteristics
    5. 5.5 AC Electrical Characteristics
    6. 5.6 Digital Electrical Characteristics
    7. 5.7 SMBus Logical Electrical Characteristics
    8. 5.8 SMBus Digital Switching Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Conversion Sequence
      2. 6.3.2  The ALERT Output
        1. 6.3.2.1 ALERT Output as a Temperature Comparator
        2. 6.3.2.2 ALERT Output as an Interrupt
        3. 6.3.2.3 ALERT Output as an SMBus ALERT
      3. 6.3.3  SMBus Interface
      4. 6.3.4  Power-On Reset (POR) Default States
      5. 6.3.5  Temperature Data Format
      6. 6.3.6  Open-Drain Outputs, Inputs, and Pull-Up Resistors
      7. 6.3.7  Diode Fault Detection
      8. 6.3.8  Communicating with the LM64
      9. 6.3.9  Digital Filter
      10. 6.3.10 Fault Queue
      11. 6.3.11 One-Shot Register
      12. 6.3.12 Serial Interface Reset
  8. Registers
    1. 7.1 LM64 Registers
      1. 7.1.1 LM64 Register Map in Hexadecimal Order
      2. 7.1.2 LM64 Register Map in Functional Order
      3. 7.1.3 LM64 Initial Register Sequence and Register Descriptions in Functional Order
        1. 7.1.3.1 LM64 Required Initial Fan Control Register Sequence
      4. 7.1.4 LM64 Register Descriptions in Functional Order
        1. 7.1.4.1 Fan Control Registers
        2. 7.1.4.2 Configuration Register
        3. 7.1.4.3 Tachometer Count And Limit Registers
        4. 7.1.4.4 Local Temperature And Local High Setpoint Registers
        5. 7.1.4.5 Remote Diode Temperature, Offset And Setpoint Registers
        6. 7.1.4.6 ALERT Status And Mask Registers
        7. 7.1.4.7 Conversion Rate And One-Shot Registers
        8. 7.1.4.8 ID Registers
    2. 7.2 General Purpose Registers
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Fan Control Duty Cycle VS. Register Settings and Frequency
        1. 8.1.1.1 Computing Duty Cycles for a Given Frequency
      2. 8.1.2 Use of the Lookup Table for Non-Linear PWM Values VS Temperature
      3. 8.1.3 NON-Ideality Factor and Temperature Accuracy
        1. 8.1.3.1 Diode Non_Ideality
        2. 8.1.3.2 Compensating for Diode Non-Ideality
      4. 8.1.4 Computing RPM of the Fan from the TACH Count
    2. 8.2 Typical Application
  10. Layout
    1. 9.1 PCB Layout for Minimizing Noise
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-A080DA33-E426-4ED7-A130-1DF99E4DFE1E-low.gif Figure 4-1 24-pin WQFN Package
Table 4-1 Pin Descriptions
Pin Name Input/Output Function and Connection
1 GPIO1 Digital Input/
Open-Drain Output
General Purpose Open-Drain Digital Output or Digital Input. Typical pull-up resistor is 10 kΩ to VDD.
2 GPIO2 Digital Input/
Open-Drain Output
General Purpose Open-Drain Digital Output or Digital Input. Typical pull-up resistor is 10 kΩ to VDD.
3 GPIO3 Digital Input/
Open-Drain Output
General Purpose Open-Drain Digital Output or Digital Input. Typical pull-up resistor is 10 kΩ to VDD.
4 PWM Open-Drain
Digital Output
Open-Drain Digital Output. Connect to fan drive circuitry. The power-on default for this pin is low (pin 4 pulled to ground).
5 VDD Power Supply Input Connect to a low-noise +3.3 ± 0.3 VDC power supply, and bypass to GND with a 0.1 µF ceramic capacitor in parallel with a 100 pF ceramic capacitor. A bulk capacitance of 10 µF needs to be in the vicinity of the LM64's VDD pin.
6 D+ Analog Input Connect to the anode (positive side) of the remote diode. A 2.2 nF ceramic capacitor must be connected between pins 6 and 7.
7 D- Analog Input Connect to the cathode (negative side) of the remote diode. A 2.2 nF ceramic capacitor must be connected between pins 6 and 7.
8 T_Crit Open-Drain
Digital Output
Open-Drain Digital Output. Typical pull-up resistor is 3 kΩ to VDD.
9 N/C N/A No Connection.
10 N/C N/A No Connection.
11 N/C N/A No Connection.
12 A0 Digital Input SMBus Address Select pin. If High, the SMBus address is 0x4E or, if Low, the SMBus address is 0x18. Typical pull-up resistor is 10 kΩ to VDD.
13 GND Ground This is the analog and digital ground return.
14 ALERT Open-Drain
Digital Output
This pin is an open-drain ALERT Output. Typical pull-up resistor is 3 kΩ to VDD.
15 TACH Digital Input This pin is a digital tachometer input. Typical pull-up resistor is 3 kΩ to VDD.
16 SMBDAT Digital Input/
Open-Drain Output
This is the bi-directional SMBus data line. Typical pull-up resistor is 1.5 kΩ to VDD.
17 SMBCLK Digital Input This is the SMBus clock input. Typical pull-up resistor is 1.5 kΩ to VDD.
18 GPIO5 Digital Input/
Open-Drain Output
General Purpose Open-Drain Digital Output or Digital Input. Typical pull-up resistor is 10 kΩ to VDD.
19 GPIO4 Digital Input/
Open-Drain Output
General Purpose Open-Drain Digital Output or Digital Input. Typical pull-up resistor is 10 kΩ to VDD.
20 GPD1 Digital Input General Purpose Default Input Pin. Typical pull-up resistor is 10 kΩ to VDD. Always connect to a logical High or Low level.
21 GPD2 Digital Input General Purpose Default Input Pin. Typical pull-up resistor is 10 kΩ to VDD. Always connect to a logical High or Low level.
22 GPD3 Digital Input General Purpose Default Input Pin. Typical pull-up resistor is 10 kΩ to VDD. Always connect to a logical High or Low level.
23 GPD4 Digital Input General Purpose Default Input Pin. Typical pull-up resistor is 10 kΩ to VDD. Always connect to a logical High or Low level.
24 GPD5 Digital Input General Purpose Default Input Pin. Typical pull-up resistor is 10 kΩ to VDD. Always connect to a logical High or Low level.