SNAS207B May   2004  – January 2024 LM64

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Operating Ratings
    3. 5.3 DC Electrical Characteristics
    4. 5.4 Operating Electrical Characteristics
    5. 5.5 AC Electrical Characteristics
    6. 5.6 Digital Electrical Characteristics
    7. 5.7 SMBus Logical Electrical Characteristics
    8. 5.8 SMBus Digital Switching Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Conversion Sequence
      2. 6.3.2  The ALERT Output
        1. 6.3.2.1 ALERT Output as a Temperature Comparator
        2. 6.3.2.2 ALERT Output as an Interrupt
        3. 6.3.2.3 ALERT Output as an SMBus ALERT
      3. 6.3.3  SMBus Interface
      4. 6.3.4  Power-On Reset (POR) Default States
      5. 6.3.5  Temperature Data Format
      6. 6.3.6  Open-Drain Outputs, Inputs, and Pull-Up Resistors
      7. 6.3.7  Diode Fault Detection
      8. 6.3.8  Communicating with the LM64
      9. 6.3.9  Digital Filter
      10. 6.3.10 Fault Queue
      11. 6.3.11 One-Shot Register
      12. 6.3.12 Serial Interface Reset
  8. Registers
    1. 7.1 LM64 Registers
      1. 7.1.1 LM64 Register Map in Hexadecimal Order
      2. 7.1.2 LM64 Register Map in Functional Order
      3. 7.1.3 LM64 Initial Register Sequence and Register Descriptions in Functional Order
        1. 7.1.3.1 LM64 Required Initial Fan Control Register Sequence
      4. 7.1.4 LM64 Register Descriptions in Functional Order
        1. 7.1.4.1 Fan Control Registers
        2. 7.1.4.2 Configuration Register
        3. 7.1.4.3 Tachometer Count And Limit Registers
        4. 7.1.4.4 Local Temperature And Local High Setpoint Registers
        5. 7.1.4.5 Remote Diode Temperature, Offset And Setpoint Registers
        6. 7.1.4.6 ALERT Status And Mask Registers
        7. 7.1.4.7 Conversion Rate And One-Shot Registers
        8. 7.1.4.8 ID Registers
    2. 7.2 General Purpose Registers
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Fan Control Duty Cycle VS. Register Settings and Frequency
        1. 8.1.1.1 Computing Duty Cycles for a Given Frequency
      2. 8.1.2 Use of the Lookup Table for Non-Linear PWM Values VS Temperature
      3. 8.1.3 NON-Ideality Factor and Temperature Accuracy
        1. 8.1.3.1 Diode Non_Ideality
        2. 8.1.3.2 Compensating for Diode Non-Ideality
      4. 8.1.4 Computing RPM of the Fan from the TACH Count
    2. 8.2 Typical Application
  10. Layout
    1. 9.1 PCB Layout for Minimizing Noise
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Absolute Maximum Ratings

See(1)(2)(3)
Supply Voltage, VDD−0.3 V to 6.0 V
Voltage on SMBDAT, SMBCLK,   ALERT, T_Crit, PWM Pins−0.5 V to 6.0 V
Voltage on Other Pins−0.3 V to (VDD + 0. 3 V)
Input Current, D− Pin±1 mA
Input Current at All Other Pins (4)5 mA
Package Input Current (4)30 mA
Package Power Dissipation
SMBDAT, ALERT, T_Crit, PWM pins
See (5)
Output Sink Current10 mA
Storage Temperature−65°C to +150°C
ESD Susceptibility(6)   Human Body Model2000 V
Machine Model200 V
SMT Soldering Information
See AN-1187 (SNOA401Q), "Leadless Leadframe Package" for information on SMT Assembly using LLP Packages.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
All voltages are measured with respect to GND, unless otherwise noted.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
When the input voltage (VIN) at any pin exceeds the power supplies (VIN < GND or VIN > V+), the current at that pin should be limited to 5 mA. Parasitic components and/or ESD protection circuitry are shown in the Table 5-1, for the LM64's pins, by an "X" when it exists. Care should be taken not to forward bias the parasitic diode, D1, present on pins D+ and D−. Doing so by more than 50 mV may corrupt temperature measurements.
See AN-1187 SNOA401 for Thermal Resistance Junction-to-Ambient Temperature.
Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. See Figure 5-2 for the ESD Protection Input Structure.