To ensure the proper operation of the
device, proper power on sequencing needs to be followed.
- When power is initially applied,
the Power-on Reset (POR) circuitry will reset the registers and state machines
to a default state.
- Before any programming is done, the voltages at VCC_CP, VCC_VCO, VCC_VCO2,
VCC_MASH, and VCC_BUF are at lest above the minimum operating votlage of 3.15
V.
- Although the POR circuitry does
initialize the device, it is good practice to toggle the RESET bit from 1 to 0
to manually do a software reset. This is necessary to ensure that the internal
state machines, bias levels, and overall device current reset to a stable
starting condition. This reset takes less 1 μs.
- Program the registers in
descending order; R0 should be the last register programmed. This loads the
device to the desired state.
- Wait 10 ms to allow the internal
LDOs to power up.
- Program the R0 register one more
time to activate the VCO calibration with the LDOs in a stable state. Even if
this was done before, the calibration is not valid if it was done before the
LDOs in the chip are at the proper levels. Also, it is important to have a
stable and accurate input reference as the VCO calibration is based off of this.
An input reference may be applied earlier to the device without damaging it.
This applies to both the calibration methods with and without instant
calibration.
- After the VCO has calibrated, the
frequency will be closer, but not exact. The frequency must settle out with the
analog lock time, which adds to the VCO digital calibration.
- After the analog PLL lock is
done, the output is valid. There may be a signal that comes out of the output
before this, but the frequency may not be valid.