SNAS783C June 2020 – February 2021 LMX2820
PRODUCTION DATA
When the frequencies are known, the loop filter must be designed. The integration of phase noise over a certain bandwidth (jitter) is an performance specification that translates to signal-to-noise ratio. Phase noise inside the loop bandwidth is dominated by the PLL, while the phase noise outside the loop bandwidth is dominated by the VCO.
Generally, jitter is lowest if the loop bandwidth is designed to the point where the two intersect. A higher phase margin loop filter design has less peaking at the loop bandwidth and thus lower jitter. The trade-off with this is that longer lock times and spurs must be considered in design as well.
The PLLatinum Sim software is very useful in designing the loop filter and is available on the TI website. Using this tool, the results in Table 8-4 were obtained.
COMPONENT | VALUE | UNIT |
---|---|---|
C1 | 390 | pF |
C2 | 68 | nF |
C3 | 1.8 | nF |
R2 | 68 | Ω |
R3 | 18 | Ω |