JAJSSA6 December   2023 BQ25960H

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charging System
      2. 8.3.2  Battery Charging Profile
      3. 8.3.3  Device Power Up
      4. 8.3.4  Device HIZ State
      5. 8.3.5  Dual Input Bi-Directional Power Path Management
        1. 8.3.5.1 ACDRV Turn-On Condition
        2. 8.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
        3. 8.3.5.3 Single Input with ACFET1
        4. 8.3.5.4 Dual Input with ACFET1-RBFET1
        5. 8.3.5.5 Dual Input with ACFET1-RBFET1 and ACFET2-RBFET2
        6. 8.3.5.6 OTG and Reverse TX Mode Operation
      6. 8.3.6  Bypass Mode Operation
      7. 8.3.7  Charging Start-Up
      8. 8.3.8  Adapter Removal
      9. 8.3.9  Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
      10. 8.3.10 Device Modes and Protection Status
        1. 8.3.10.1 Input Overvoltage, Overcurrent, Undercurrent, Reverse-Current and Short-Circuit Protection
        2. 8.3.10.2 Battery Overvoltage and Overcurrent Protection
        3. 8.3.10.3 IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring
      11. 8.3.11 INT Pin, STAT, FLAG, and MASK Registers
      12. 8.3.12 Dual Charger Operation Using Primary and Secondary Modes
      13. 8.3.13 CDRVH and CDRVL_ADDRMS Functions
    4. 8.4 Programming
      1. 8.4.1 F/S Mode Protocol
    5. 8.5 Register Maps
      1. 8.5.1 I2C Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Standalone Application Information (for use with main charger)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 サード・パーティ製品に関する免責事項
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Option Addendum
    2. 14.2 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.7 Charging Start-Up

The host can start Switched Cap or Bypass Mode charging follow the steps below:

  1. Both VBUS and VOUT need to be present. Host can check the status through VBUSPRESENT_STAT (REG15[2]) and VOUTPRSENT_STAT (REG15[5]). Both of them need to be '1'.
  2. Host sets all the protections to the desired thresholds. Refer to the Device Modes and Protection Status section for proper setting.
  3. Host sets either Switched Cap Mode or Bypass Mode through EN_BYPASS bit (REG0F[3]) based on adapter type.
  4. Host sets the desired switching frequency in Switched Cap Mode through FSW_SET [2:0] bits (REG10[7:5]).
  5. Host sets BUS under current protection (BUSUCP) to 250 mA though BUSUCP bit (REG05[6])=1
  6. Host sets charger configuration bits: CHG_CONFIG_1 (REG05[3])=1.
  7. Host can enable charge by setting CHG_EN=1.
  8. Once charge has been enabled, the CONV_ACTIVE_STAT bit is set to '1' to indicate either switched cap or bypass is active, and current starts to flow to the battery.
  9. When watchdog timer expires, CHG_EN is reset to '0' and charging stops. Host needs to read or write any register bit before watchdog expires, or disable watchdog timer (set REG10[2]=1) to prevent watchdog timer from expiring.