JAJSES5P July   2006  – February 2018 TLK2711-SP

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     外部部品の相互接続
  4. 4 改訂履歴
  5. 5 概要(続き)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 TTL Input Electrical Characteristics
    6. 7.6 Transmitter/Receiver Electrical Characteristics
    7. 7.7 Reference Clock (TXCLK) Timing Requirements
    8. 7.8 TTL Output Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Transmit Interface
      2. 8.3.2  Transmit Data Bus
      3. 8.3.3  Data Transmission Latency
      4. 8.3.4  8-Bit/10-Bit Encoder
      5. 8.3.5  Pseudo-Random Bit Stream (PRBS) Generator
      6. 8.3.6  Parallel to Serial
      7. 8.3.7  High-Speed Data Output
      8. 8.3.8  Receive Interface
      9. 8.3.9  Receive Data Bus
      10. 8.3.10 Data Reception Latency
      11. 8.3.11 Serial to Parallel
      12. 8.3.12 Comma Detect and 8-Bit/10-Bit Decoding
      13. 8.3.13 LOS Detection
      14. 8.3.14 PRBS Verification
      15. 8.3.15 Reference Clock Input
      16. 8.3.16 Operating Frequency Range
      17. 8.3.17 Testability
      18. 8.3.18 Loopback Testing
      19. 8.3.19 BIST
      20. 8.3.20 Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Mode
      2. 8.4.2 High-Speed I/O Directly-Coupled Mode
      3. 8.4.3 High-Speed I/O AC-Coupled Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.4 8-Bit/10-Bit Encoder

All true serial interfaces require a method of encoding to ensure minimum transition density, so that the receiving phase-locked loop (PLL) has a minimal number of transitions to stay locked on. The encoding scheme maintains the signal DC balance by keeping the number of 1s and 0s the same. This provides good transition density for clock recovery and improves error checking. The TLK2711-SP uses the 8-bit/10-bit encoding algorithm that is used by fibre channel and gigabit ethernet. This is transparent to the user, as the TLK2711-SP internally encodes and decodes the data such that the user reads and writes actual 16-bit data.

The 8-bit/10-bit encoder converts 8-bit-wide data to a 10-bit-wide encoded data character to improve its transmission characteristics. Because the TLK2711-SP is a 16-bit-wide interface, the data is split into two 8-bit-wide bytes for encoding. Each byte is fed into a separate encoder. The encoding is dependent upon two additional input signals, TKMSB and TKLSB.

Table 1. Transmit Data Controls

TKLSB TKMSB 16-BIT PARALLEL INPUT
0 0 Valid data on TXD0 to TXD7 Valid data TXD8 to TXD15
0 1 Valid data on TXD0 to TXD7 K code on TXD8 to TXD15
1 0 K code on TXD0 to TXD7 Valid data on TXD8 to TXD15
1 1 K code on TXD0 to TXD7 K code on TXD8 to TXD15