JAJU802A January   2022  – October 2022

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TMS320F2800137
      2. 2.3.2 TMS320F280025C
      3. 2.3.3 TMS320F280039C
      4. 2.3.4 UCC28740
      5. 2.3.5 UCC27517
      6. 2.3.6 TLV9062
      7. 2.3.7 TLV76733
    4. 2.4 System Design Theory
      1. 2.4.1 Interleaved PFC
        1. 2.4.1.1 Full Bridge Diode Rectifier Rating
        2. 2.4.1.2 Inductor Ratings
        3. 2.4.1.3 AC Voltage Sensing
        4. 2.4.1.4 DC Link Voltage Sensing
        5. 2.4.1.5 Bus Current Sensing
        6. 2.4.1.6 DC Link Capacitor Rating
        7. 2.4.1.7 MOSFET Ratings
        8. 2.4.1.8 Diode Ratings
      2. 2.4.2 Three-Phase PMSM Drive
        1. 2.4.2.1 Field Oriented Control of PM Synchronous Motor
        2. 2.4.2.2 Sensorless Control of PM Synchronous Motor
          1. 2.4.2.2.1 Enhanced Sliding Mode Observer with Phase Locked Loop
            1. 2.4.2.2.1.1 Mathematical Model and FOC Structure of an IPMSM
            2. 2.4.2.2.1.2 Design of ESMO for the IPMSM
            3. 2.4.2.2.1.3 Rotor Position and Speed Estimation with PLL
        3. 2.4.2.3 Field Weakening (FW) and Maximum Torque Per Ampere (MTPA) Control
        4. 2.4.2.4 Compressor Drive with Automatic Vibration Compensation
        5. 2.4.2.5 Fan Drive with Flying Start
        6. 2.4.2.6 Hardware Prerequisites for Motor Drive
          1. 2.4.2.6.1 Motor Current Feedback
            1. 2.4.2.6.1.1 Current Sensing with Three-Shunt
            2. 2.4.2.6.1.2 Current Sensing with Single-Shunt
          2. 2.4.2.6.2 Motor Voltage Feedback
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Getting Started Hardware
      1. 3.1.1 Hardware Board Overview
      2. 3.1.2 Test Conditions
      3. 3.1.3 Test Equipment Required for Board Validation
      4. 3.1.4 Test Setup
    2. 3.2 Getting Started Firmware
      1. 3.2.1 Download and Install Software Required for Board Test
      2. 3.2.2 Opening Project Inside CCS
      3. 3.2.3 Project Structure
    3. 3.3 Test Procedure
      1. 3.3.1 Build Level 1: CPU and Board Setup
        1. 3.3.1.1 Start CCS and Open Project
        2. 3.3.1.2 Build and Load Project
        3. 3.3.1.3 Setup Debug Environment Windows
        4. 3.3.1.4 Run the Code
      2. 3.3.2 Build Level 2: Open Loop Check with ADC Feedback
        1. 3.3.2.1 Start CCS and Open Project
        2. 3.3.2.2 Build and Load Project
        3. 3.3.2.3 Setup Debug Environment Windows
        4. 3.3.2.4 Run the Code
      3. 3.3.3 Build Level 3: Closed Current Loop Check
        1. 3.3.3.1 Start CCS and Open Project
        2. 3.3.3.2 Build and Load Project
        3. 3.3.3.3 Setup Debug Environment Windows
        4. 3.3.3.4 Run the Code
      4. 3.3.4 Build Level 4: Full PFC and Motor Drive Control
        1. 3.3.4.1  Start CCS and Open Project
        2. 3.3.4.2  Build and Load Project
        3. 3.3.4.3  Setup Debug Environment Windows
        4. 3.3.4.4  Run the Code
        5. 3.3.4.5  Run the System
        6. 3.3.4.6  Tuning Motor Drive FOC Parameters
        7. 3.3.4.7  Tuning PFC Parameters
        8. 3.3.4.8  Tuning Field Weakening and MTPA Control Parameters
        9. 3.3.4.9  Tuning Flying Start Control Parameters
        10. 3.3.4.10 Tuning Vibration Compensation Parameters
        11. 3.3.4.11 Tuning Current Sensing Parameters
    4. 3.4 Test Results
      1. 3.4.1 Performance Data and Curves
      2. 3.4.2 Functional Waveforms
      3. 3.4.3 Transient Waveforms
      4. 3.4.4 MCU CPU Load, Memory and Peripherals Usage
        1. 3.4.4.1 CPU Load for Full Implementation
        2. 3.4.4.2 Memory Usage
        3. 3.4.4.3 Peripherals Usage
    5. 3.5 Migrate Firmware to a New Hardware Board
      1. 3.5.1 Configure the PWM, CMPSS, and ADC Modules
      2. 3.5.2 Setup Hardware Board Parameters
      3. 3.5.3 Configure Faults Protection Parameters
      4. 3.5.4 Setup Motor Electrical Parameters
      5. 3.5.5 Setup PFC Control Parameters
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 Bill of Materials
      3. 4.1.3 Altium Project
      4. 4.1.4 Gerber Files
      5. 4.1.5 PCB Layout Guidelines
    2. 4.2 Software Files
    3. 4.3 Documentation Support
    4. 4.4 サポート・リソース
    5. 4.5 Trademarks
  10. 5Terminology
  11. 6Revision History

3.2.3 Project Structure

The general structure of the project is shown in Figure 3-6. The device peripherals configuration is based on C2000Ware driverlib. The users only need to change the codes and definitions in hal.c and hal.h, and the parameters in user_mtr1/mtr2/pfc.h if they want to migrate the reference design software to their own board.

Figure 3-6 Project Structure Overview

Once the project is imported, the project explore will appear inside CCS as shown in Figure 3-7.

The folder src_foc includes the typical FOC modules include transform, PID and estimators that consist of the motor drive algorithm are independent on specific device and board.

The folder src_lib includes the digital power control modules for PFC, InstaSPIN-FOC library and math library that is independent of device and board.

The folder src_sys includes some files reserved for system control that are independent on specific device and board.

The folder src_control includes motor drive and PFC control files that call motor and PFC control core algorithm functions within the interrupt service routines and background tasks.

The F28002x, F28003x and F280013x projects share all of the control algorithm files. Board-specific, motor-specific and device-specific files are in the folder of src_board, these files consist of device specific drivers to run the solution. The F28002x, F28003x and F280013x have a dedicated hal.c, hal.h, user_mtr1.h, user_mtr2.h, and user_pfc.h separately. So the user only needs to make some changes in these header files, hal.c, hal.h, user_mtr1.h, user_mtr2.h, and user_pfc.h based on the usage of device peripherals for the board if the user wants to migrate the project into a different board or device.

Figure 3-7 Project Explorer View of the Dual Motor Control and PFC Project

Figure 3-8 shows the project software flow diagram of the firmware that includes three ISRs for PFC and motor control, a main loop for PFC and motor control parameters update in background loop.

Figure 3-8 Project Flow Diagram of the Firmware

The project consists of three interrupt service routines, which are called every PWM cycle or every two PWM cycles. A few background tasks are called in a polling fashion and can be used to run slow tasks for which absolute timing accuracy is not required, such as PFC control parameters update, motor control parameters update and so on. A CPU timer is used to trigger slow background tasks.

motor1CtrlISR is reserved for calling the motor drive control algorithms to spin the motor 1 (Compressor) that is periodically triggered at USER_M1_ISR_FREQ_Hz.

motor2CtrlISR is reserved for calling the motor drive control algorithms to spin the motor 2 (Fan) that is periodically triggered at USER_M2_ISR_FREQ_Hz.

pfcCtrlISR is reserved for calling the digital power control algorithms to implement PFC that is periodically triggered at USER_PFC_ISR_FREQ_Hz.

To simplify the system bring up and design the software of this reference design is organized in four labs with incremental builds (PFC_BUILDLEVEL and DMC_BUILDLEVEL), which makes learning and getting familiar with the board and software easier. This approach is also good for debugging and testing boards. The detailed incremental build options is shown as in Table 3-1. To select a particular build option, select the corresponding BUILDLEVEL option in sys_settings.h. Once the build option is selected, compile the project by selecting rebuild all compiler option. Section 3.3 provides more details to run each of the build level options.

Table 3-1 Incremental Build Options
OPERATIONBUILD OPTIONDESCRIPTION
PFCPFC_LEVEL_150% PWM duty output, verify ADC offset calibration, PWM output and phase shift
PFC_LEVEL_2Open loop control to check current and voltage sensing signals for PFC
PFC_LEVEL_3Closed current loop
PFC_LEVEL_4Closed current and voltage loop
MOTOR DRIVEDMC_LEVEL_150% PWM duty, verify ADC offset calibration, PWM output and phase shift
DMC_LEVEL_2Open loop control to check current and voltage sensing signals for motor 1 and 2
DMC_LEVEL_3Closed current loop to check the hardware settings
DMC_LEVEL_4Motor parameters identify and run with InstaSPIN-FOC/eSMO