SPRUJ86A October   2023  – January 2024 AM263P4

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
      1.      Preface: Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Device Information
      1. 1.3.1 HSEC 180-pin Control Card Docking Station
      2. 1.3.2 Security
  6. 2Hardware
    1. 2.1  Component Identification
    2. 2.2  Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
      4. 2.2.4 Power Sequence
      5. 2.2.5 PMIC
    3. 2.3  Functional Block Diagram
    4. 2.4  Reset
    5. 2.5  Clock
    6. 2.6  Boot Mode Selection
    7. 2.7  JTAG Path Selection
    8. 2.8  Header Information
    9. 2.9  GPIO Mapping
    10. 2.10 Push Buttons
    11. 2.11 Interfaces
      1. 2.11.1  Memory Interface
        1. 2.11.1.1 OSPI/QSPI
        2. 2.11.1.2 Board ID EEPROM
      2. 2.11.2  Ethernet Interface
        1. 2.11.2.1 Control Card Ethernet Routing
        2. 2.11.2.2 On Board Ethernet PHY
        3. 2.11.2.3 LED Indication in RJ45 Connector
      3. 2.11.3  I2C
      4. 2.11.4  Industrial Application LEDs
      5. 2.11.5  SPI
      6. 2.11.6  UART
      7. 2.11.7  MCAN
      8. 2.11.8  FSI
      9. 2.11.9  JTAG
      10. 2.11.10 Test Automation Header
      11. 2.11.11 LIN
      12. 2.11.12 MMC
      13. 2.11.13 ADC and DAC
    12. 2.12 HSEC Pinout and Pinmux Mapping
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 If You Need Assistance
    2. 4.2 Trademarks
  9. 5Related Documentation
    1. 5.1 Supplemental Content
      1.      5.1.A E1 Board Modifications
      2.      5.1.B E2 Design Changes
  10. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  11. 7Revision History

2.11.1.1 OSPI/QSPI

The AM263Px Control Card has a 128Mbit QSPI NAND flash memory device (W25N01GVZEJ), which is connected to the QSPI0 interface of the AM263Px SoC. The QSPI supports single data rates with memory speeds up to 104 MHz. The QSPI flash is powered by the 3.3-V IO supply (VSYS_3V3_LDO1).

Note: There is typically a reset pin for Flash memory. The Reset pin is not present in the WSON package that is used in the Control Card.

The QSPI0_D0/D1 signals are also used for BOOTMODE control logic. There are 10-kΩ resistors used to isolate the BOOTMODE control logic after the value is latched.

The AM263Px Control Card also has a 32Mbit OSPI NOR flash memory device (IS25LX256-LHLE), which is connected to the OSPI0 interface of the AM263Px SoC.

There is a high speed data switch that controls the routing of the memory data signals between the two flash memories. GPIO37 from the AM263Px SoC is used to drive the select line of the high-speed data switch. There is a pull-up resistor on the select line and therefore the OSPI memory device is selected by default.

GUID-2BB33F2B-DA97-444B-BA5C-3B62A418177F-low.png Figure 2-18 OSPI/QSPI Interface
Table 2-14 Memory Mux Table
Select Condition Mux Function
HIGH OSPI NOR flash selected A→B port
LOW QSPI NAND flash selected A→C port