SLOA277B january   2019  – july 2023 LM124 , LM124-N , LM124A , LM158 , LM158-N , LM158A , LM224 , LM224-N , LM224A , LM258 , LM258-N , LM258A , LM2902 , LM2902-N , LM2902-Q1 , LM2902K , LM2902KAV , LM2904 , LM2904-N , LM2904-Q1 , LM2904B , LM2904B-Q1 , LM2904BA , LM321 , LM324 , LM324-N , LM324A , LM358 , LM358-N , LM358A , LM358B , LM358BA , TS321 , TS321-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Devices Covered in Application Note
    1. 1.1 Common Schematic
    2. 1.2 Base Part Numbers
    3. 1.3 Input Voltage Offset Grades
    4. 1.4 Maximum Supply Voltage
    5. 1.5 High Reliability Options
    6. 1.6 HBM ESD Grade
    7. 1.7 LM358B, LM358BA, LM2904B, LM2904BA, LM324B, LM2902B
  5. 2Input Stage Considerations
    1. 2.1 Input Stage Schematic
    2. 2.2 Input Common Mode Range
    3. 2.3 Input Impedance
    4. 2.4 Phase Reversal
  6. 3Output Stage Considerations
    1. 3.1 Output Stage Schematic, VOL and IOL
    2. 3.2 IOL and Common Mode Voltage
    3. 3.3 Output Stage Schematic, VOH and IOH
    4. 3.4 Short Circuit Sourcing Current
    5. 3.5 Output Voltage Limitations
  7. 4AC Performance
    1. 4.1 Slew Rate and Bandwidth
    2. 4.2 Slew Rate Variability
    3. 4.3 Output Crossover Time Delay
    4. 4.4 First Crossover Example
    5. 4.5 Second Crossover Example
  8. 5Low VCC Guidance
    1. 5.1 Low VCC Input Range Supporting –40°C
    2. 5.2 Low VCC Output Range Supporting –40°C
    3. 5.3 Low VCC Audio Amplifier Example
  9. 6Comparator Usage
    1. 6.1 Op Amp Limitations
    2. 6.2 Input and Output Voltage Ranges
    3. 6.3 Overload Recovery
    4. 6.4 Slew Rate
  10. 7Unused Amp Connections and Inputs Connected Directly to Ground
    1. 7.1 Do Not Connect Inputs Directly to Ground
    2. 7.2 Unused Amplifier Connections
  11. 8Conclusion
  12. 9Revision History

4.3 Output Crossover Time Delay

This op amp family does not provide any static bias for any of the output transistors (Class B type) highlighted in the blue boxes in Figure 4-4. Most other op amp designs provide a small static bias to the output transistors (Class AB type) to make output current transitions seamless. The advantage of having no static bias is allowing the ‘Constant Current Sink’ driver to pull the output close to the negative supply voltage. The disadvantage of having no static bias is a time delay when switching between the output source and sink drivers.

GUID-5D7ABF3F-0FBB-4591-80EF-FA87F7D4A62D-low.gif Figure 4-4 Schematic with the Following Time Delay Components Highlighted: Shared Input Node (Green), Compensation Capacitor (Red), and Output Transistors (Blue)

The op amp’s Darlington NPN driver and PNP emitter follower output transistors share an input signal highlighted in the green box. The compensation capacitor is also connected to this common node. Therefore, the slew rate of the green node is the same as the output’s slew rate, which can be found on the data sheet as a typical value. When the op amp needs to change between the Darlington NPN and PNP emitter follower drivers, there is a time delay of approximately

T Delay =   3   ×   V BE Slew   Rate

Depending on the application, this delay may or may not be significant. The maximum application frequency and load current range are relevant factors in determining whether or not the time delay will be significant.

Two test circuits, shown in Figure 4-5 and Figure 4-7, are specifically designed to maximize the visual effect of the crossover time delay. In many applications, the crossover time does not cause any issues. However, extra care should be taken when there are high frequency signals, fast rise or fall times, or when distortion must be minimized. Output pull down or pull up resistors can be added to keep either the output source or sink driver continually active, thereby preventing time delays.