SPRUJB5 February   2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 Specification
  8. 2Hardware
    1. 2.1 Key Features and Interfaces
    2. 2.2 Power On/Off Procedure
    3. 2.3 Power Input
      1. 2.3.1 Power Input
      2. 2.3.2 Power Budget Considerations
    4. 2.4 User Inputs and Settings
      1. 2.4.1 Boot Configuration Settings
      2. 2.4.2 Board Configuration Settings
      3. 2.4.3 Reset Pushbutton
      4. 2.4.4 User Pushbutton And LEDs
    5. 2.5 Standard Interfaces
      1. 2.5.1 Audio Input/Output
      2. 2.5.2 DisplayPort and HDMI
      3. 2.5.3 Gigabit Ethernet
      4. 2.5.4 JTAG and Emulation
      5. 2.5.5 MicroSD Card Cage
      6. 2.5.6 PCIe Card Module
      7. 2.5.7 UARTs for Terminal and Logging
      8. 2.5.8 USB Interfaces
    6. 2.6 Expansion Interfaces
      1. 2.6.1 Camera Interface, 22-Pin Flex
      2. 2.6.2 Camera Interface, 40-Pin Expansion
      3. 2.6.3 CAN-Bus Interface
      4. 2.6.4 DSI Display Interface
      5. 2.6.5 OLDI/LVDS Display Interface
      6. 2.6.6 User Expansion Header
    7. 2.7 Circuit Details
      1. 2.7.1 Interface Mapping
      2. 2.7.2 I2C Address Mapping
      3. 2.7.3 GPIO Mapping
      4. 2.7.4 I2C GPIO Expander Mapping
      5. 2.7.5 Power Monitoring
      6. 2.7.6 Identification EEPROM
      7. 2.7.7 Memory and Storage
      8. 2.7.8 Power Distribution
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  10. 4Compliance Information
    1. 4.1 Thermal Compliance
    2. 4.2 EMC, EMI, and ESD Compliance
  11. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
    2. 5.2 Trademarks

2.6.2 Camera Interface, 40-Pin Expansion

The EVM includes two 40-pin (2x20, 2.54mm pitch) high speed camera interface expansion connectors [J36][J37]. Each expansion connector supports two MIPI CSI-2 (4 lanes each), power, and control signals (I2C, GPIO, and so forth). The camera expansion interfaces are shared or multiplexed between the 40-pin high speed expansion and the 22-pin flex connectors and. See Section 2.7.4 for details on selection control.

To enable identical camera modules to be used simultaneously, I2C mux is used to select each camera (TCA9543). The voltage level for Clock/Control signals is selectable between 1.8V and 3.3V. See Section 2.7.4 for details.

Table 2-10 40-Pin High-Speed Camera Expansion Pin Definition [J36]
Pin #Pin NameDescription (Processor Pin #)Dir
1Power

Input Power Dependent (5V-20V)

Output
2I2C_SCLI2C Clock, TCA9543 Port 0 (See I2C Table)Bi-Dir
3PowerInput Power Dependent (5V-20V)Output
4I2C_SDAI2C Data, TCA9543 Port 0 (See I2C Table)Bi-Dir
5CSI2_CLK_PCSIPort 2 ClockInput
6GPIO/PWMAGPIO,

See GPIO Table

Bi-Dir
7CSI2_CLK_NCSIPort 2 ClockInput
8GPIO/PWMBGPIO,

See GPIO Table

Bi-Dir
9CSI2_D0_PCSIPort 2 Data Lane 0Input
10REFCLK25MHz

Clock Source

Output
11CSI2_D0_NCSI Port 2 Data Lane 0Input
12GNDGround
13CSI2_D1_PCSI Port 2 Data Lane 1Input
14RESETz

Reset, See GPIO Table

Output
15CSI2_D1_NCSI Port 2 Data Lane 1Input
16GNDGround
17CSI2_D2_PCSI Port 2 Data Lane 2Input
18GPIOGPIO,

See GPIO Table

Bi-Dir
19CSI2_D2_NCSI Port 2 Data Lane 2Input
20GPIOGPIO,

See GPIO Table

Bi-Dir
21CSI2_D3_PCSI Port 2 Data Lane 3Input
22GPIOGPIO,

See GPIO Table

Bi-Dir
23CSI2_D3_NCSI Port 2 Data Lane 3Input
24GNDGround
25CSI3_CLK_PCSI Port 3 ClockInput
26CSI3_D3_PCSI Port 3 Data Lane 3Input
27CSI3_CLK_NCSI Port 3 ClockInput
28CSI3_D3_NCSI Port 3 Data Lane 3Input
29CSI3_D0_PCSI Port 3 Data Lane 0Input
30PowerPower, 3.3VOutput
31CSI3_D0_NCSI Port 3 Data Lane 0Input
32PowerPower, 3.3VOutput
33CSI3_D1_PCSI Port 3 Data Lane 1Input
34PowerPower, 3.3VOutput
35CSI3_D1_NCSI Port 3 Data Lane 1Input
36PowerPower, 3.3VOutput
37CSI3_D2_PCSI Port 3 Data Lane 2Input
38PowerPower, IO Level (1.8 or 3.3V)Output
39CSI3_D2_NCSI Port 3 Data Lane 2Input
40PowerPower, IO Level (1.8 or 3.3V)Output
Table 2-11 40-Pin High-Speed Camera Expansion Pin Definition [J37]
Pin # Pin Name Description (Processor Pin #) Dir
1 Power

Input Power Dependent (5V-20V)

 Output
2 I2C_SCL I2C Clock, TCA9543 Port 0 (See I2C Table) Bi-Dir
3 Power Input Power Dependent (5V-20V) Output
4 I2C_SDA I2C Data, TCA9543 Port 0 (See I2C Table) Bi-Dir
5 CSI0_CLK_P CSIPort 0 Clock Input
6 GPIO/PWMA GPIO,

See GPIO Table

 Bi-Dir
7 CSI0_CLK_N CSIPort 0 Clock Input
8 GPIO/PWMB GPIO,

See GPIO Table

 Bi-Dir
9 CSI0_D0_P CSIPort 0 Data Lane 0 Input
10 REFCLK 25MHz

Clock Source

 Output
11 CSI0_D0_N CSI Port 0 Data Lane 0 Input
12 GND Ground
13 CSI0_D1_P CSI Port 0 Data Lane 1 Input
14 RESETz

Reset, See GPIO Table

 Output
15 CSI0_D1_N CSI Port 0 Data Lane 1 Input
16 GND Ground
17 CSI0_D2_P CSI Port 0 Data Lane 2 Input
18 GPIO GPIO,

See GPIO Table

 Bi-Dir
19 CSI0_D2_N CSI Port 0 Data Lane 2 Input
20 GPIO GPIO,

See GPIO Table

 Bi-Dir
21 CSI0_D3_P CSI Port 0 Data Lane 3 Input
22 GPIO GPIO,

See GPIO Table

 Bi-Dir
23 CSI0_D3_N CSI Port 0 Data Lane 3 Input
24 GND Ground
25 CSI1_CLK_P CSI Port 1 Clock Input
26 CSI1_D3_P CSI Port 1 Data Lane 3 Input
27 CSI1_CLK_N CSI Port 1 Clock Input
28 CSI1_D3_N CSI Port 1 Data Lane 3 Input
29 CSI1_D0_P CSI Port 1 Data Lane 0 Input
30 Power Power, 3.3V Output
31 CSI1_D0_N CSI Port 1 Data Lane 0 Input
32 Power Power, 3.3V Output
33 CSI1_D1_P CSI Port 1 Data Lane 1 Input
34 Power Power, 3.3V Output
35 CSI1_D1_N CSI Port 1 Data Lane 1 Input
36 Power Power, 3.3V Output
37 CSI1_D2_P CSI Port 1 Data Lane 2 Input
38 Power Power, IO Level (1.8 or 3.3V) Output
39 CSI1_D2_N CSI Port 1 Data Lane 2 Input
40 Power Power, IO Level (1.8 or 3.3V) Output