전원 관리 게이트 드라이버 절연 게이트 드라이버

UCC21520

활성

DW 패키지에서 듀얼 입력, 비활성 핀, 8V UVLO를 지원하는 5.7kVrms, 4A/6A 듀얼 채널 절연 게이트 드라이버

이 제품의 최신 버전이 있습니다

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
신규 UCC21550 활성 IGBT용 DIS 및 DT 핀이 있는 4A/6A, 5kVRMS 듀얼 채널 절연 게이트 드라이버 Tighter VCCI range supporting digital controller thresholds. New DT equation. Increased CMTI and wider operating temperature range.

제품 상세 정보

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Enable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Enable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5, 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • TTL and CMOS compatible inputs
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Industry standard wide body SOIC-16 (DW) package
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • TTL and CMOS compatible inputs
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Industry standard wide body SOIC-16 (DW) package
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011

The UCC21520 and the UCC21520A are isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 and the UCC21520A enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21520 and the UCC21520A are isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 and the UCC21520A enable high efficiency, high power density, and robustness in a wide variety of power applications.

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기술 문서

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모두 보기25
유형 직함 날짜
* Data sheet UCC21520 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver datasheet (Rev. E) PDF | HTML 2021/12/17
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 2024/02/29
White paper Understanding failure modes in isolators (Rev. B) PDF | HTML 2024/01/29
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 2024/01/25
Technical article For efficiencies’ sake – how to integrate bidirectional power flow into your UPS design (part 1) PDF | HTML 2024/01/11
Certificate UCC215xx CQC Certificate of Product Certification 2023/08/17
Certificate UCC21520 CQC Certificate of Product Certification (Rev. A) 2023/08/16
Certificate UL Certification E181974 Vol 4. Sec 7 (Rev. C) 2022/12/02
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021/12/16
EVM User's guide Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) PDF | HTML 2021/10/21
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/02/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/02/28
E-book E-book: An engineer’s guide to industrial robot designs 2020/02/12
Certificate CSA Product Certificate (Rev. A) 2019/08/15
White paper Impact of an isolated gate driver (Rev. A) 2019/02/20
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 2018/05/16
Technical article For efficiencies’ sake – how to integrate bidirectional power flow (part 2) PDF | HTML 2017/09/19
Technical article Making a solar inverter more reliable than the sun PDF | HTML 2017/08/01
White paper Cities grow smarter through innovative semiconductor technologies 2017/07/07
Technical article Pile on to a charger – my EV needs power PDF | HTML 2016/12/20
Technical article Don't forget the gate driver: it’s the muscle PDF | HTML 2016/09/20
Technical article Staying cool, efficiently PDF | HTML 2016/08/22
Technical article How to reduce system cost in a three-phase IGBT-based inverter design PDF | HTML 2016/08/08
Technical article Why is the cloud isolated? PDF | HTML 2016/07/18
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 2016/07/05

설계 및 개발

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평가 보드

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평가 보드

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사용 설명서: PDF | HTML
TI.com에서 구매할 수 없습니다
시뮬레이션 모델

UCC21520 PSpice Transient Model

SLUM544.ZIP (59 KB) - PSpice Model
시뮬레이션 모델

UCC21520 TINA-TI Reference Design

SLUM552.TSC (168 KB) - TINA-TI Reference Design
시뮬레이션 모델

UCC21520 TINA-TI Transient Spice Model

SLUM551.ZIP (23 KB) - TINA-TI Spice Model
시뮬레이션 모델

UCC21520 Unencrypted PSpice Transient Model

SLUM543.ZIP (3 KB) - PSpice Model
계산 툴

SLURAZ5 UCC21520 Bootstrap Calculator 1.0

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
절연 게이트 드라이버
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시뮬레이션 툴

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패키지 다운로드
SOIC (DW) 16 옵션 보기

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