SPRSPA3A March 2024 – September 2024 AM67 , AM67A
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | MIN | MAX | UNIT | ||
---|---|---|---|---|---|
VDD_CORE | Core supply | -0.3 | 1.05 | V | |
VDDR_CORE | RAM core supply | -0.3 | 1.05 | V | |
VDD_CANUART | CANUART core supply | -0.3 | 1.05 | V | |
VDDA_CORE_CSI_DSI | CSIRX0 and DSITX0 core supply | -0.3 | 1.05 | V | |
VDDA_CORE_CSI_DSI_CLK | CSIRX0 and DSITX0 clock core supply | -0.3 | 1.05 | V | |
VDDA_CORE_USB0 VDDA_CORE_USB1 | USB0 and USB1 core supply | -0.3 | 1.05 | V | |
VDDA_DDR_PLL0 | DDR deskew PLL supply | -0.3 | 1.05 | V | |
VDD_MMC0 | MMC0 PHY core supply | -0.3 | 1.05 | V | |
VDDA_0P85_DLL_MMC0 | MMC0 DLL analog supply | -0.3 | 1.05 | V | |
VDDA_0P85_SERDES VDDA_0P85_SERDES_C | SERDES analog supply | -0.3 | 1.05 | V | |
VDDS_DDR | DDR PHY IO supply | -0.3 | 1.57 | V | |
VDDS_DDR_C | DDR clock IO supply | -0.3 | 1.57 | V | |
VDDA_1P8_SERDES | SERDES PHY IO supply | -0.3 | 1.98 | V | |
VDDS_MMC0 | MMC0 PHY IO supply | -0.3 | 1.98 | V | |
VDDS_OSC0 | MCU_OSC0 and WKUP_LFOSC0 supply | -0.3 | 1.98 | V | |
VDDA_MCU | RCOSC, POR, POK, and MCU PLL analog supply | -0.3 | 1.98 | V | |
VDDA_PLL0 | SMS PLL analog supply | -0.3 | 1.98 | V | |
VDDA_PLL1 | MAIN PLL, PER0 PLL, and PER1 PLL analog supply | -0.3 | 1.98 | V | |
VDDA_PLL2 | DDR PLL and ARM0 PLL analog supply | -0.3 | 1.98 | V | |
VDDA_PLL3 | VIDEO PLL and GPU PLL analog supply | -0.3 | 1.98 | V | |
VDDA_PLL4 | DSS PLL0, DSS PLL1, and DSS PLL2 analog supply | -0.3 | 1.98 | V | |
VDDA_PLL5 | C7x PLL analog supply | -0.3 | 1.98 | V | |
VDDA_1P8_CSI_DSI | CSIRX0 and DSITX0 1.8 V analog supply | -0.3 | 1.98 | V | |
VDDA_1P8_OLDI0 | OLDI0 1.8 V analog supply | -0.3 | 1.98 | V | |
VDDA_1P8_USB0 VDDA_1P8_USB1 | USB0 and USB1 1.8 V analog supply | -0.3 | 1.98 | V | |
VDDA_TEMP0 | TEMP0 analog supply | -0.3 | 1.98 | V | |
VDDA_TEMP1 | TEMP1 analog supply | -0.3 | 1.98 | V | |
VDDA_TEMP2 | TEMP2 analog supply | -0.3 | 1.98 | V | |
VPP | eFuse ROM programming supply | -0.3 | 1.98 | V | |
VDDSHV_MCU | IO supply for IO group MCU | -0.3 | 3.63 | V | |
VDDSHV_CANUART | IO supply for IO group CANUART | -0.3 | 3.63 | V | |
VDDSHV0 | IO supply for IO group 0 | -0.3 | 3.63 | V | |
VDDSHV1 | IO supply for IO group 1 | -0.3 | 3.63 | V | |
VDDSHV2 | IO supply for IO group 2 | -0.3 | 3.63 | V | |
VDDSHV3 | IO supply for IO group 3 | -0.3 | 3.63 | V | |
VDDSHV5 | IO supply for IO group 5 | -0.3 | 3.63 | V | |
VDDSHV6 | IO supply for IO group 6 | -0.3 | 3.63 | V | |
VDDA_3P3_USB0 VDDA_3P3_USB1 | USB0 and USB1 3.3 V analog supply | -0.3 | 3.63 | V | |
Steady-state max voltage at all fail-safe IO pins | MCU_PORz | -0.3 | 3.63 | V | |
MCU_I2C0_SCL,
MCU_I2C0_SDA, WKUP_I2C0_SCL, WKUP_I2C0_SDA, EXTINTn When operating at 1.8V |
-0.3 | 1.98(3) | V | ||
MCU_I2C0_SCL,
MCU_I2C0_SDA, WKUP_I2C0_SCL, WKUP_I2C0_SDA, EXTINTn When operating at 3.3V |
-0.3 | 3.63(3) | |||
VMON_1P8_SOC | -0.3 | 1.98 | V | ||
VMON_3P3_SOC | -0.3 | 3.63 | V | ||
VMON_VSYS(4) | -0.3 | 1.98 | V | ||
Steady-state max voltage at all other IO pins(5) | USB0_VBUS, USB1_VBUS(6) | -0.3 | 3.6 | V | |
All other IO pins | -0.3 | IO supply voltage + 0.3 | V | ||
Transient overshoot and undershoot at IO pin | 20% of IO supply voltage for up to 20% of the signal period (see Figure 6-1) | 0.2 × VDD(7) | V | ||
Latch-up performance(8) | I-Test | -100 | 100 | mA | |
Over-Voltage (OV) Test | 1.5 x VDD(7) | V | |||
TSTG | Storage temperature | -55 | +150 | °C |
Fail-safe IO terminals are designed such they do not have dependencies on the respective IO power supply voltage. This allows external voltage sources to be connected to these IO terminals when the respective IO power supplies are turned off. The MCU_I2C0_SCL, MCU_I2C0_SDA, WKUP_I2C0_SCL, WKUP_I2C0_SDA, EXTINTn, VMON_1P8_SOC, VMON_3P3_SOC, and MCU_PORz are the only fail-safe IO terminals. All other IO terminals are not fail-safe and the voltage applied to them should be limited to the value defined by the Steady State Max. Voltage at all IO pins parameter in Section 6.1.