The device contains six
multicontroller Inter-Integrated Circuit (I2C) controllers. Each I2C controller was
designed to be compliant to the Philips I2C-bus™ specification version
2.1. However, the device IOs are not fully compliant to the I2C electrical
specification. The speeds supported and exceptions are described per port below:
- I2C0, I2C1, I2C2, and I2C3
- Speeds:
- Standard-mode
(up to 100Kbits/s)
- Fast-mode (up
to 400Kbits/s)
- Exceptions:
- The IOs
associated with these ports are not compliant to the fall
time requirements defined in the I2C specification because
they are implemented with higher performance LVCMOS
push-pull IOs that were designed to support other signal
functions that could not be implemented with I2C compatible
IOs. The LVCMOS IOs being used on these ports are connected
such they emulate open-drain outputs. This emulation is
achieved by forcing a constant low output and disabling the
output buffer to enter the Hi-Z state.
- The I2C
specification defines a maximum input voltage VIH
of (VDDmax + 0.5V), which exceeds the
absolute maximum ratings for the device IOs. The system must
be designed to ensure the I2C signals never exceed the
limits defined in the Absolute Maximum Ratings
section of this datasheet.
- MCU_I2C0 and WKUP_I2C0
- Speeds:
- Standard-mode
(up to 100Kbits/s)
- Fast-mode (up
to 400Kbits/s)
- Hs-mode (up
to 3.4Mbits/s)
- Exceptions:
- The IOs
associated with these ports were not design to support
Hs-mode while operating at 3.3V. So Hs-mode is limited to
1.8V operation.
- The rise and
fall times of the I2C signals connected to these ports must
not exceed a slew rate of 0.08V/ns (or 8E+7V/s) when
operating at 3.3V. This limit is more restrictive than the
minimum fall time limits defined in the I2C specification.
Therefore, it may be necessary to add additional capacitance
to the I2C signals to slow the rise and fall times such that
they do not exceed a slew rate of 0.08V/ns.
- The I2C
specification defines a maximum input voltage VIH
of (VDDmax + 0.5V), which exceeds the
absolute maximum ratings for the device IOs. The system must
be designed to ensure the I2C signals never exceed the
limits defined in the Absolute Maximum Ratings
section of this datasheet.
Note: I2C3 has one or more signals which
can be multiplexed to more than one pin. Timing is only valid for specific pin
combinations known as IOSETs. Valid pin combinations or IOSETs for this interface
are defined in the
SysConfig-PinMux Tool.
Refer to the Philips I2C-bus
specification version 2.1 for timing details.
For more details about features and
additional description information on the device Inter-Integrated Circuit, see the
corresponding subsections within Signal Descriptions and Detailed
Description sections.