SLUSCM3K June 2016 – July 2020 BQ77904 , BQ77905
PRODUCTION DATA
The BQ7790x device supports the ability to greatly reduce production test time by cutting down on protection fault delay times. To shorten fault times, place the BQ7790x device into Customer Test Mode (CTM). CTM is triggered by raising VDD to VCTM voltage above the highest cell input pin (that is, VC5) for tCTM_ENTRY time.
The CTM is expected to be used in single-chip designs only. CTM is not supported for stacked designs. Once the device is in CTM, all fault delay and non-current fault's recovery delay times reduce to a value of tCTM_DELAY. The fault recovery time for overcurrent faults (OCD1, OCD2, and SCD) is reduced to tCTM_OC_REC.
Verification of protection fault functionality can be accomplished in a reduced time frame in CTM. Reducing the VDD voltage to the same voltage applied to the highest-cell input pin for tCTM_ENTRY will exit CTM.
In CTM, with reduced time for all internal delays, qualification of all faults will be reduced to a single instance. Thus in this mode, fault condition qualification is more susceptible to transients, so take care to have fault conditions clearly and cleanly applied during test mode to avoid false triggering of fault conditions during CTM.