SWRS272C april   2023  – june 2023 CC2340R5

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Revision History
  7. 6 Device Comparison
  8. 7 Pin Configuration and Functions
    1. 7.1 Pin Diagram – RKP Package (Top View)
    2. 7.2 Signal Descriptions – RKP Package
    3. 7.3 Connections for Unused Pins and Modules – RKP Package
    4. 7.4 Pin Diagram – RGE Package (Top View)
    5. 7.5 Signal Descriptions – RGE Package
    6. 7.6 Connections for Unused Pins and Modules – RGE Package
    7. 7.7 RKP and RGE Peripheral Pin Mapping
    8. 7.8 RKP and RGE Peripheral Signal Descriptions
  9. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  DCDC
    5. 8.5  Global LDO (GLDO)
    6. 8.6  Power Supply and Modules
    7. 8.7  Battery Monitor
    8. 8.8  Temperature Sensor
    9. 8.9  Power Consumption - Power Modes
    10. 8.10 Power Consumption - Radio Modes
    11. 8.11 Nonvolatile (Flash) Memory Characteristics
    12. 8.12 Thermal Resistance Characteristics
    13. 8.13 RF Frequency Bands
    14. 8.14 Bluetooth Low Energy - Receive (RX)
    15. 8.15 Bluetooth Low Energy - Transmit (TX)
    16. 8.16 Proprietary Radio Modes
    17. 8.17 2.4 GHz RX/TX CW
    18. 8.18 Timing and Switching Characteristics
      1. 8.18.1 Reset Timing
      2. 8.18.2 Wakeup Timing
      3. 8.18.3 Clock Specifications
        1. 8.18.3.1 48 MHz Crystal Oscillator (HFXT)
        2. 8.18.3.2 48 MHz RC Oscillator (HFOSC)
        3. 8.18.3.3 32 kHz Crystal Oscillator (LFXT)
        4. 8.18.3.4 32 kHz RC Oscillator (LFOSC)
    19. 8.19 Peripheral Characteristics
      1. 8.19.1 UART
        1. 8.19.1.1 UART Characteristics
      2. 8.19.2 SPI
        1. 8.19.2.1 SPI Characteristics
        2. 8.19.2.2 SPI Controller Mode
        3. 8.19.2.3 SPI Timing Diagrams - Controller Mode
        4. 8.19.2.4 SPI Peripheral Mode
        5. 8.19.2.5 SPI Timing Diagrams - Peripheral Mode
      3. 8.19.3 I2C
        1. 8.19.3.1 I2C
        2. 8.19.3.2 I2C Timing Diagram
      4. 8.19.4 GPIO
        1. 8.19.4.1 GPIO DC Characteristics
      5. 8.19.5 ADC
        1. 8.19.5.1 Analog-to-Digital Converter (ADC) Characteristics
      6. 8.19.6 Comparators
        1. 8.19.6.1 Ultra-low power comparator
  10. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Bluetooth 5.3 Low Energy
      2. 9.3.2 802.15.4 (Thread and Zigbee)
    4. 9.4  Memory
    5. 9.5  Cryptography
    6. 9.6  Timers
    7. 9.7  Serial Peripherals and I/O
    8. 9.8  Battery and Temperature Monitor
    9. 9.9  µDMA
    10. 9.10 Debug
    11. 9.11 Power Management
    12. 9.12 Clock Systems
    13. 9.13 Network Processor
  11. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  12. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 Tools and Software
      1. 11.2.1 SimpleLink™ Microcontroller Platform
    3. 11.3 Documentation Support
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.19.5.1 Analog-to-Digital Converter (ADC) Characteristics

Tc = 25 °C, VDDS = 3.0 V, unless otherwise noted.(2)
Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.
 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ADC Power Supply and Input Range Conditions
V(Ax) Analog input voltage range All ADC analog input pins Ax 0 VDDS V
I(ADC) single-ended mode Operating supply current
into VDDS terminal 		 RES = 0x0 (12Bit mode), Fs = 1.2MSPS, Internal reference OFF (ADCREF_EN = 0), VeREF+ = VDDS 480 μA
RES = 0x0 (12Bit mode), Fs = 266ksps, Internal reference ON (ADCREF_EN = 0), ADCREF = 2.5V 365
CI GPIO  Input capacitance into a single terminal 5 7 pF
RI GPIO Input MUX ON-resistance 0.5 1 kΩ
ADC Switching Characteristics
FS ADCREF ADC sampling frequency when using the internal ADC reference voltage ADCREF_EN = 1, RES = 0x0 (12-bit), VDDS = 1.71V to VDDSmax 267 (1) ksps
FS ADCREF ADC sampling frequency when using the internal ADC reference voltage ADCREF_EN = 1, RES = 0x1 (10-bit), VDDS = 1.71V to VDDSmax 308 (1) ksps
FS ADCREF ADC sampling frequency when using the internal ADC reference voltage ADCREF_EN = 1, RES = 0x2 (8-bit), VDDS = 1.71V to VDDSmax 400 (1) ksps
FS EXTREF ADC sampling frequency when using the external ADC reference voltage ADCREF_EN = 0, VeREF+ = VDDS, RES = 0x0 (12-bit), VDDS = 1.71V to VDDSmax 1.2 (1) Msps
FS EXTREF ADC sampling frequency when using the external ADC reference voltage ADCREF_EN = 0, VeREF+ = VDDS, RES = 0x1 (10-bit), VDDS = 1.71V to VDDSmax 1.33 (1) Msps
FS EXTREF ADC sampling frequency when using the external ADC reference voltage ADCREF_EN = 0, VeREF+ = VDDS, RES = 0x2 (8-bit), VDDS = 1.71V to VDDSmax 1.6 (1) Msps
NCONVERT Clock cycles for conversion RES = 0x0 (12-bit) 14 cycles
NCONVERT Clock cycles for conversion RES = 0x1 (10-bit) 12 cycles
NCONVERT Clock cycles for conversion RES = 0x2 (8-bit) 9 cycles
tSample Sampling time RES = 0x0 (12-bit), RS = 25 Ω, Cpext = 10 pF. +/- 0.5 LSB settling 250 ns
tVSUPPLY/3(sample) Sample time required when Vsupply/3 channel is selected 20 µs
ADC Linearity Parameters
EI Integral linearity error (INL) for single-ended inputs 12-bit Mode, VR+ = VeREF+ = VDDS, VDDS=1.71-->3.8 +/- 2 LSB
ED Differential linearity error (DNL) 12-bit Mode, VR+ = VeREF+ = VDDS, VDDS=1.71-->3.8 +/- 1 LSB
EO Offset error 12-bit Mode, External reference, VR+ = VeREF+ = VDDS, VDDS=1.71-->3.8 1.98 LSB
EO Offset error 12-bit Mode, Internal reference, VR+ = ADCREF = 2.5V 1.02 LSB
EG Gain error External Reference, VR+ = VeREF+ = VDDS , VDD= 1.71-->3.8 +/- 2 LSB
EG Gain error Internal reference, VR+ = ADCREF = 2.5V +/- 40 LSB
ADC Dynamic Parameters
ENOB Effective number of bits  ADCREF_EN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x2 (8-bit) 8 bit
ENOB Effective number of bits  ADCREF_EN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x1 (10-bit) 9.9 bit
ENOB Effective number of bits  ADCREF_EN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x0 (12-bit) 11.2 bit
ENOB Effective number of bits ADCREF_EN = 1, ADCREF_VSEL = {2.5V, 1.4V}, RES = 0x2 (8-bit) 8 bit
ENOB Effective number of bits ADCREF_EN = 1, ADCREF_VSEL = {2.5V, 1.4V} , RES = 0x1 (10-bit)
9.6
 		 bit
ENOB Effective number of bits ADCREF_EN = 1, ADCREF_VSEL = {2.5V, 1.4V}, RES = 0x0 (12-bit)
10.4		 bit
ENOB Effective number of bits VDDS reference, RES = 0x0 (12-bit)
11.2		 bit
SINAD Signal-to-noise and distortion ratio ADCREF_EN = 0, VeREF+ = VDDS =3.3V, VeREF-=0V, RES = 0x0 (12-bit)
 
69.18
 		 dB
SINAD Signal-to-noise and distortion ratio ADCREF_EN = 1, ADCREF_VSEL = {2.5V, 1.4V}, RES = 0x0 (12-bit)

 
64.37
 		 dB
SINAD Signal-to-noise and distortion ratio VDDS reference, RES = 0x0 (12-bit)

 
69.18
 		 dB
ADC External Reference
EXTREF Positive external reference voltage input ADCREF_EN=0, ADC reference sourced from external reference pin (VeREF+) 1.4 VDDS V
EXTREF Negative external reference voltage input ADCREF_EN=0, ADC reference sourced from external reference pin (VeREF-) 0 V
ADC Temperature Diode, Supply Monitor
ADC Internal Input: VSUPPLY / 3 Accuracy Vsupply voltage divider accuracy for supply monitoring ADC input channel: Vsupply monitor +/- 1 %
ADC Internal Input: IVsupply / 3 Vsupply voltage divider current consumption ADC input channel Vsupply monitor. Vsupply=VDDS=3.3V 10 µA
ADC Internal and VDDS Reference
VDDSREF Positive ADC reference voltage ADC reference sourced from VDDS VDDS V
ADCREF Internal ADC Reference Voltage ADCREF_EN = 1, ADCREF_VSEL = 0, VDDS = 1.71V - VDDSmax 1.4 V
ADCREF_EN = 1, ADCREF_VSEL = 1, VDDS = 2.7V - VDDSmax 2.5 V
IADCREF Operating supply current into VDDA terminal with internal reference ON ADCREF_EN = 1, VDDA = 1.7V to VDDAmax, ADCREF_VSEL = {0,1}  80 µA
tON Internal ADC Reference Voltage power on-time ADCREF_EN = 1 2 µs
(1) Measured with 48MHz HFOSC
(2) Using IEEE Std 1241-2010 for terminology and test methods