SWRS272F April 2023 – November 2025 CC2340R2 , CC2340R5
PRODMIX
Refer to the PDF data sheet for device specific package drawings
| PARAMETERS | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tCS.LEAD | CS lead-time, CS active to clock | 1/2 | SCLK | |||
| tCS.LAG | CS lag time, Last clock to CS inactive | 1/2 | SCLK | |||
| tCS.ACC | CS access time, CS active to POCI data out | VDDS = 3.3V | 35 | ns | ||
| tCS.ACC | CS access time, CS active to POCI data out | VDDS = 1.8V | 50 | ns | ||
| tCS.DIS | CS disable time, CS inactive to POCI high impedance | VDDS = 3.3V | 35 | ns | ||
| tCS.DIS | CS disable time, CS inactive to POCI high impedance | VDDS = 1.8V | 50 | ns | ||
| tSU.PI | PICO input data setup time | 13 | ns | |||
| tHD.PI | PICO input data hold time | 0 | ns | |||
| tVALID.PO | POCI output data valid time(1) | SCLK edge to POCI valid, CL = 20pF, 3.3V | 35 | ns | ||
| tVALID.PO | POCI output data valid time(1) | SCLK edge to POCI valid, CL = 20pF, 1.8V | 50 | ns | ||
| tHD.PO | POCI output data hold time(2) | CL = 20pF | 0 | ns | ||