SWRS272F April   2023  – November 2025 CC2340R2 , CC2340R5

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configurations and Functions
    1. 6.1 Pin Diagrams
      1. 6.1.1 Pin Diagram—RKP Package (Top View)
      2. 6.1.2 Pin Diagram—RGE Package (Top View)
      3. 6.1.3 Pin Diagram—YBG Package (Top View)
    2.     12
    3. 6.2 Signal Descriptions
      1.      14
      2.      15
      3.      16
      4.      17
      5.      18
      6.      19
      7.      20
      8.      21
      9.      22
      10.      23
      11.      24
      12.      25
      13.      26
      14.      27
      15.      28
      16.      29
      17.      30
      18.      31
    4. 6.3 Connections for Unused Pins and Modules
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  DCDC
    5. 7.5  Global LDO (GLDO)
    6. 7.6  Power Supply and Modules
    7. 7.7  Battery Monitor
    8. 7.8  Temperature Sensor
    9. 7.9  Power Consumption–Power Modes
    10. 7.10 Power Consumption–Radio Modes
    11. 7.11 Nonvolatile (Flash) Memory Characteristics
    12. 7.12 Thermal Resistance Characteristics
    13. 7.13 RF Frequency Bands
    14. 7.14 Bluetooth Low Energy–Receive (RX)
    15. 7.15 Bluetooth Low EnergyTransmit (TX)
    16. 7.16 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    17. 7.17 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    18. 7.18 Proprietary Radio Modes
    19. 7.19 2.4GHz RX/TX CW
    20. 7.20 Timing and Switching Characteristics
      1. 7.20.1 Reset Timing
      2. 7.20.2 Wakeup Timing
      3. 7.20.3 Clock Specifications
        1. 7.20.3.1 48MHz Crystal Oscillator (HFXT)
        2. 7.20.3.2 48MHz RC Oscillator (HFOSC)
        3. 7.20.3.3 32kHz Crystal Oscillator (LFXT)
        4. 7.20.3.4 32kHz RC Oscillator (LFOSC)
    21. 7.21 Peripheral Characteristics
      1. 7.21.1 UART
        1. 7.21.1.1 UART Characteristics
      2. 7.21.2 SPI
        1. 7.21.2.1 SPI Characteristics
        2. 7.21.2.2 SPI Controller Mode
        3. 7.21.2.3 SPI Timing Diagrams—Controller Mode
        4. 7.21.2.4 SPI Peripheral Mode
        5. 7.21.2.5 SPI Timing Diagrams—Peripheral Mode
      3. 7.21.3 I2C
        1. 7.21.3.1 I2C
        2. 7.21.3.2 I2C Timing Diagram
      4. 7.21.4 GPIO
        1. 7.21.4.1 GPIO DC Characteristics
      5. 7.21.5 ADC
        1. 7.21.5.1 Analog-to-Digital Converter (ADC) Characteristics
      6. 7.21.6 Comparators
        1. 7.21.6.1 Ultra-Low Power Comparator
    22. 7.22 Typical Characteristics
      1. 7.22.1 MCU Current
      2. 7.22.2 RX Current
      3. 7.22.3 TX Current
      4. 7.22.4 RX Performance
      5. 7.22.5 TX Performance
      6. 7.22.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth Low Energy
      2. 8.3.2 802.15.4 (Thread and Zigbee)
    4. 8.4  Memory
    5. 8.5  Cryptography
    6. 8.6  Timers
    7. 8.7  Serial Peripherals and I/O
    8. 8.8  Battery and Temperature Monitor
    9. 8.9  µDMA
    10. 8.10 Debug
    11. 8.11 Power Management
    12. 8.12 Clock Systems
    13. 8.13 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
  • YBG|28
  • RKP|40
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.21.3.1 I2C

Over operating free-air temperature range (unless otherwise noted)
PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
fSCL SCL clock frequency 0 400 kHz
tHD,STA Hold time (repeated) START fSCL = 100kHz 4.0 µs
tHD,STA Hold time (repeated) START fSCL > 100kHz 0.6 µs
tSU,STA Setup time for a repeated START fSCL = 100kHz 4.7 µs
tSU,STA Setup time for a repeated START fSCL > 100kHz  0.6 µs
tHD,DAT Data hold time 0 µs
tSU,DAT Data setup time fSCL = 100kHz 250 ns
tSU,DAT Data setup time fSCL > 100kHz  100 ns
tSU,STO Setup time for STOP fSCL = 100kHz 4.0 µs
tSU,STO Setup time for STOP fSCL > 100kHz   0.6 µs
tBUF Bus free time between STOP and START conditions fSCL = 100kHz 4.7 µs
tBUF Bus free time between STOP and START conditions fSCL > 100kHz   1.3 µs
tSP Pulse duration of spikes supressed by input deglitch filter 50 ns