SPRS950F December 2015 – May 2019 DRA744 , DRA745 , DRA746 , DRA750 , DRA756
Refer to the PDF data sheet for device specific package drawings
For more information, see Power, Reset, and Clock Management / PRCM Environment / External Clock Signal and Power Reset / PRCM Functional Description / PRCM Clock Manager Functional Description section of the Device TRM.
Audio Back End (ABE) module is not supported for this family of devices, but “ABE” name is still present in some clock or DPLL names.
The device operation requires the following clocks:
The Device also embeds an internal free-running 32-kHz oscillator that is always active as long as the the wake-up (WKUP) domain is supplied.
Figure 6-1 shows the external input clock sources and the output clocks to peripherals.