DRA756 Dual 1.5 GHz A15, dual EVE, dual DSP, extended peripherals SoC processor for infotainment

Description

DRA75x and DRA74x (Jacinto 6) infotainment applications processors are built to meet the intense processing needs of the modern infotainment-enabled automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm^® Cortex^®-A15 RISC CPUs with Arm^® Neon™ extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

The DRA75x and DRA74x Jacinto 6 processor family is qualified according to the AEC-Q100 standard.

Features

Architecture designed for infotainment applications
Video, image, and graphics processing support
- Full-HD video (1920 × 1080p, 60 fps)
- Multiple video input and video output
- 2D and 3D graphics
Dual Arm^® Cortex^®-A15 microprocessor subsystem
Up to two C66x floating-point VLIW DSP
- Fully object-code compatible with C67x and C64x+
- Up to thirty-two 16 x 16-Bit fixed-point multiplies per cycle
Up to 2.5MB of on-chip L3 RAM
Level 3 (L3) and level 4 (L4) interconnects
Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
- Supports up to DDR2-800 and DDR3-1066
- Up to 2GB supported per EMIF
Dual Arm^® Cortex^®-M4 Image Processing Units (IPU)
Up to two Embedded Vision Engines (EVEs)
IVA subsystem
Display subsystem
- Display controller with DMA engine and up to three pipelines
- HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
Video Processing Engine (VPE)
2D-graphics accelerator (BB2D) subsystem
- Vivante^® GC320 core
Dual-core PowerVR^® SGX544 3D GPU
Three Video Input Port (VIP) modules
- Support for up to 10 multiplexed input ports
General-Purpose Memory Controller (GPMC)
Enhanced Direct Memory Access (EDMA) controller
2-port gigabit ethernet (GMAC)
Sixteen 32-Bit general-purpose timers
32-Bit MPU watchdog timer
Five Inter-Integrated Circuit (I²C™) ports
HDQ™/1-Wire^® interface
SATA interface
MediaLB^® (MLB) subsystem
Ten configurable UART/IrDA/CIR modules
Four Multichannel Serial Peripheral Interfaces (McSPI)
Quad SPI (QSPI)
Eight Multichannel Audio Serial Port (McASP) modules
SuperSpeed USB 3.0 dual-role device
Three high-speed USB 2.0 dual-role devices
Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC™/SD^®/SDIO)
PCI-Express^® 3.0 subsystems with two 5-Gbps lanes
- One 2-lane gen2-compliant port
- or Two 1-lane gen2-compliant ports
Dual Controller Area Network (DCAN) modules
- CAN 2.0B protocol
Up to 247 General-Purpose I/O (GPIO) pins
Real-Time Clock SubSystem (RTCSS)
Device security features
- Hardware crypto accelerators and DMA
- Firewalls
- JTAG^® lock
- Secure keys
- Secure ROM and boot
Power, Reset, and Clock Management (PRCM)
On-chip debug with CTools technology
28-nm CMOS technology
23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA (ABC)

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Parametrics

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Part number	Order	Arm CPU	Arm MHz (Max.)	DSP	DSP MHz (Max)	Graphics acceleration	DRAM	Co-processor(s)	Hardware accelerators	EMIF	Other on-chip memory	Ethernet MAC	Parallel video input ports	Display	Serial I/O	Storage interface	PCIe	McASP	Security enabler	USB
DRA756	Order now	2 ARM Cortex-A15	1500	2 C66x	750	1 2D 2 3D	DDR2-800 DDR3-1066 DDR3L-1066	2 ARM Cortex-M4	2 EVE 1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking	2 32-bit	2.5 MB	10/100/1000 2-port 1Gb switch	10	1 HDMI OUT 3 LCD OUT	CAN I2C SPI UART USB	1x SDIO 4b 1x SDIO 8b 1x UHSI 4b 1x eMMC 8b	2 PCIe Gen2	8	Cryptographic acceleration Debug security Device identity Secure boot Secure storage Trusted execution environment	1 USB3.0 3 USB2.0
DRA750	Samples not available	2 ARM Cortex-A15	1000	2 C66x	750	1 2D 2 3D	DDR2-800 DDR3-1066 DDR3L-1066	2 Dual ARM Cortex-M4	1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking	2 32-bit	512 KB	10/100/1000 2-port 1Gb switch	10	1 HDMI OUT 3 LCD OUT	CAN I2C SPI UART USB	1x SDIO 4b 1x SDIO 8b 1x UHSI 4b 1x eMMC 8b	2 PCIe Gen2	8	Cryptographic acceleration Debug security Device identity Secure boot Secure storage Trusted execution environment	1 USB3.0 3 USB2.0

DRA756 ACTIVE This product has been released to the market and is available for purchase. For some products, newer alternatives may be available. Dual 1.5 GHz A15, dual EVE, dual DSP, extended peripherals SoC processor for infotainment

Description

Features

Parametrics

DRA756
ACTIVE

This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.

Dual 1.5 GHz A15, dual EVE, dual DSP, extended peripherals SoC processor for infotainment