SLASF54A January   2023  – July 2025 DRV2901

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Block Diagrams
    2. 6.2 Feature Description
      1. 6.2.1 Error Reporting
      2. 6.2.2 Device Reset
      3. 6.2.3 Device Protection System
        1. 6.2.3.1 Overcurrent (OC) Protection With Current Limiting and Overload Detection
        2. 6.2.3.2 Overtemperature Protection
        3. 6.2.3.3 Undervoltage Protection (UVP) and Power-On Reset (POR)
  8. 7 Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 System Power-up/power-down Sequence
        1. 7.3.1.1 Powering Up
        2. 7.3.1.2 Powering Down
      2. 7.3.2 System Design Recommendations
        1. 7.3.2.1 VDD Pin
        2. 7.3.2.2 VREG Pin
        3. 7.3.2.3 OTW Pin
        4. 7.3.2.4 Bootstrap Capacitors
    4. 7.4 Layout
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Recommended Operating Conditions

MINTYPMAXUNIT
PVDD_XHalf-bridge supplyDC supply voltage05052.5V
GVDD_XSupply for logic regulators and gate-drive circuitryDC supply voltage10.81213.2V
VDDDigital regulator inputDC supply voltage10.81213.2V
LOutputOutput-filter inductanceMinimum output inductance under short-circuit condition510μH
FPWMPWM frequency

20

600

kHz
TJJunction temperature0125°C