SLVSE65C July   2018  – December 2023 DRV8847

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Operation
        1. 7.3.2.1 Forward Operation
        2. 7.3.2.2 Reverse Operation
        3. 7.3.2.3 Coast Operation (Fast Decay)
        4. 7.3.2.4 Brake Operation (Slow Decay)
      3. 7.3.3 Bridge Control
        1. 7.3.3.1 4-Pin Interface
        2. 7.3.3.2 2-Pin Interface
        3. 7.3.3.3 Parallel Bridge Interface
        4. 7.3.3.4 Independent Bridge Interface
      4. 7.3.4 Current Regulation
      5. 7.3.5 Current Recirculation and Decay Modes
      6. 7.3.6 Torque Scalar
      7. 7.3.7 Stepping Modes
        1. 7.3.7.1 Full-Stepping Mode (4-Pin Interface)
        2. 7.3.7.2 Full-Stepping Mode (2-Pin Interface)
        3. 7.3.7.3 Half-Stepping Mode (With Non-Driving Fast Decay)
        4. 7.3.7.4 Half-Stepping Mode (With Non-Driving Slow Decay)
      8. 7.3.8 Motor Driver Protection Circuits
        1. 7.3.8.1 Overcurrent Protection (OCP)
          1. 7.3.8.1.1 OCP Automatic Retry (Hardware Device and Software Device (OCPR = 0b))
          2. 7.3.8.1.2 OCP Latch Mode (Software Device (OCPR = 1b))
          3. 7.3.8.1.3 42
        2. 7.3.8.2 Thermal Shutdown (TSD)
        3. 7.3.8.3 VM Undervoltage Lockout (VM_UVLO)
        4. 7.3.8.4 Open Load Detection (OLD)
          1. 7.3.8.4.1 Full-Bridge Open Load Detection
          2. 7.3.8.4.2 Load Connected to VM
          3. 7.3.8.4.3 Load Connected to GND
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 I2C Communication
        1. 7.5.1.1 I2C Write
        2. 7.5.1.2 I2C Read
      2. 7.5.2 Multi-Slave Operation
    6. 7.6 Register Map
      1. 7.6.1 Slave Address Register (Address = 0x00) [reset = 0x60]
      2. 7.6.2 IC1 Control Register (Address = 0x01) [reset = 0x00]
      3. 7.6.3 IC2 Control Register (Address = 0x02) [reset = 0x00]
      4. 7.6.4 Slew-Rate and Fault Status-1 Register (Address = 0x03) [reset = 0x40]
      5. 7.6.5 Fault Status-2 Register (Address = 0x04) [reset = 0x00]
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Stepper Motor Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Stepping Modes
            1. 8.2.1.2.1.1 Full-Stepping Operation
            2. 8.2.1.2.1.2 Half-Stepping Operation with Fast Decay
            3. 8.2.1.2.1.3 Half-Stepping Operation with Slow Decay
          2. 8.2.1.2.2 Current Regulation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Dual BDC Motor Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Motor Voltage
          2. 8.2.2.2.2 Current Regulation
          3. 8.2.2.2.3 Sense Resistor
      3. 8.2.3 Open Load Implementation
        1. 8.2.3.1 Open Load Detection Circuit
        2. 8.2.3.2 OLD for Ground Connected Load
          1. 8.2.3.2.1 Half Bridge Open
          2. 8.2.3.2.2 Half Bridge Short
          3. 8.2.3.2.3 Load Connected
        3. 8.2.3.3 OLD for Supply (VM) Connected Load
          1. 8.2.3.3.1 Half Bridge Open
          2. 8.2.3.3.2 Half Bridge Short
          3. 8.2.3.3.3 Load Connected
        4. 8.2.3.4 OLD for Full Bridge Connected Load
          1. 8.2.3.4.1 Full Bridge Open
            1. 8.2.3.4.1.1 High side comparator of half-bridge-1 (OL1_HS)
            2. 8.2.3.4.1.2 Low side comparator of half-bridge-2 (OL2_LS)
          2. 8.2.3.4.2 Full Bridge Short
            1. 8.2.3.4.2.1 High side comparator of half-bridge-1 (OL1_HS)
            2. 8.2.3.4.2.2 Low side comparator of half-bridge-2 (OL2_LS)
          3. 8.2.3.4.3 Load Connected in Full Bridge
            1. 8.2.3.4.3.1 High side comparator of half-bridge-1 (OL1_HS)
            2. 8.2.3.4.3.2 Low side comparator of half-bridge-2 (OL2_LS)
  10.   Power Supply Recommendations
    1. 9.1 Bulk Capacitance Sizing
  11. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Thermal Considerations
      1. 9.3.1 Maximum Output Current
      2. 9.3.2 Thermal Protection
    4. 9.4 Power Dissipation
  12. 10Device and Documentation Support
    1. 10.1 Device Support (Optional)
      1. 10.1.1 Development Support (Optional)
      2. 10.1.2 Device Nomenclature (Optional)
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
  13. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • PWP|16
  • RTE|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-63AA0C32-A811-4F92-A59C-23203770EDFC-low.svgFigure 5-1 DRV8847 PW Package16-Pin TSSOPTop View
GUID-B6726ACA-C1F8-4373-8284-BC29126F7166-low.svgFigure 5-3 DRV8847 RTE Package16-Pin WQFN With Exposed Thermal PadTop View
GUID-2B480D23-4D1C-45C1-902F-9A71B09B8A33-low.svgFigure 5-2 DRV8847 PWP PowerPAD™ Package16-Pin HTSSOPTop View
GUID-2CD97833-1820-427D-B144-049FBC8FCCAD-low.svgFigure 5-4 DRV8847S PW Package16-Pin TSSOPTop View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME DRV8847 DRV8847S
TSSOP
HTSSOP		 WQFN TSSOP
GND 13 11 13 PWR Device ground. Recommended to connect the GND pin and device thermal pad (HTSSOP and WQFN packages) to ground
IN1 16 14 16 I Half-bridge input 1
IN2 15 13 15 I Half-bridge input 2
IN3 9 7 9 I Half-bridge input 3
IN4 10 8 10 I Half-bridge input 4
ISEN12 3 1 3 O Full-bridge-12 sense. Connect this pin to the current sense resistor for full-bridge-12. Connect this pin to the GND pin if current regulation is not required.
ISEN34 6 4 6 O Full-bridge-34 sense. Connect this pin to the to current sense resistor for full-bridge-34. Connect this pin to the GND pin if current regulation is not required.
MODE 14 12 — I Tri-state pin for selection of driver operating mode
nFAULT 8 6 8 OD / I Fault indication pin. This pin is pulled logic low with a fault condition. This open-drain output requires an external pullup resistor. This pin is also used as an input pin for the DRV8847S device for releasing the I2C bus.
nSLEEP 1 15 1 I Sleep mode input. Set this pin to logic high to enable the device. Set this pin to logic low to go to low-power sleep mode
OUT1 2 16 2 O Half-bridge output 1
OUT2 4 2 4 O Half-bridge output 2
OUT3 7 5 7 O Half-bridge output 3
OUT4 5 3 5 O Half-bridge output 4
SCL — — 11 I I2C clock signal.
SDA — — 14 OD I2C data signal. The SDA pin requires a pullup resistor.
TRQ 11 9 — I Torque current scalar
VM 12 10 12 PWR Power supply. Connect the VM pin to the motor power supply. Bypass this pin to ground with a VM-rated 0.1-µF (ceramic) and 10-μF (minimum) capacitor.
(1) I = input, O = output, OD = open-drain output, PWR = power
GUID-20230331-SS0I-PFNJ-4RKC-QFLPHRNGW16J-low.svg Figure 5-5 DRV88471 RTE Package16-Pin WQFN With Exposed Thermal PadTop View
Table 5-2 New Pin Functions
PIN TYPE(1) DESCRIPTION
DRV8471 WQFN NO.
GND 11 PWR Device ground. Recommended to connect the GND pin and device thermal pad to ground
IN1 14 I Half-bridge input 1
IN2 13 I Half-bridge input 2
IN3 7 I Half-bridge input 3
IN4 8 I Half-bridge input 4
ISEN12 1 O Full-bridge-12 sense. Connect this pin to the current sense resistor for full-bridge-12. Connect this pin to the GND pin if current regulation is not required.
ISEN34 4 O Full-bridge-34 sense. Connect this pin to the to current sense resistor for full-bridge-34. Connect this pin to the GND pin if current regulation is not required.
NC 9 - No connect
NC 12 - No connect
nFAULT 6 OD Fault indication pin. This pin is pulled logic low with a fault condition. This open-drain output requires an external pullup resistor.
nSLEEP 15 I Sleep mode input. Set this pin to logic high to enable the device. Set this pin to logic low to go to low-power sleep mode.
OUT1 16 O Half-bridge output 1
OUT2 2 O Half-bridge output 2
OUT3 5 O Half-bridge output 3
OUT4 3 O Half-bridge output 4
VM 10 PWR Power supply. Connect the VM pin to the motor power supply. Bypass this pin to ground with a VM-rated 0.1-µF (ceramic) and 10-μF (minimum) capacitor.
(1) I = input, O = output, OD = open-drain output, PWR = power