SBOSAA4B April   2025  – August 2025 INA1H94-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: INA1H94-SP
    5. 5.5 Electrical Characteristics: VS = ±9V
    6. 5.6 Electrical Characteristics: V+ = 5V and V– = 0V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Range
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 SAR ADC 12-B, 8-Channel Battery Cell Voltage Monitor
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Device Functional Modes

The recommended maximum power supply condition for the INA1H94-SP is VS = 18V. This is achieved with an 18V single-ended supply, or split ±9V supplies. The minimum power supply condition VS = 4V. See Figure 5-1 and Figure 5-2 or check linear operation using the INA1H94-SP Linear Operation Checker to verify design compliance with the input common-mode limitations of the device.

Common-mode rejection (CMR) of the INA1H94-SP depends on the input resistor network, which is laser-trimmed for accurate ratio matching. To maintain high CMR, make sure to have low source impedance driving the two inputs. A 75Ω resistance in series with the input pins +IN and –IN decreases the common-mode rejection ratio (CMRR) from 100dB (typical) to 74dB. Resistance in series with the reference pins also degrades CMR.