Use good PCB layout practices for best operational performance of the device, including:

• Keep differential signals routed together to minimize parasitic impedance mismatch. To avoid converting common-mode signals into differential signals, make sure that both input paths are symmetrical and well-matched for source impedance and capacitance.

• Use ground pours for shielding the input pairs. Alternatively, use a dedicated analog ground plane underneath the device. To reduce parasitic coupling, run the sensitive input traces as far away as possible from noise sources and supply connections. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better than in parallel with the noisy trace.

• Noise can propagate into analog circuitry through the power supplies of the circuit. Bypass capacitors reduce the coupled noise by providing low-impedance power sources local to the difference amplifier circuit.
  • The power supplies to the device must be low-noise and well-bypassed. Use low-ESR, ceramic bypass capacitors in close proximity to the V+ and V– power-supply pins. Avoid placing vias between the supply pins and the bypass capacitors. Connect all ground pins to the ground plane using short, low impedance paths.
  • A single bypass capacitor from V+ to ground is applicable for single-supply applications.
• Minimize the number of thermal junctions. If possible, route the signal path using a single layer without vias.
• Keep sufficient distance from major thermal energy sources (circuits with high power dissipation). If not possible, place the device so that the effects of the thermal energy source on the high and low sides of the differential signal path are evenly matched.
• Keep the traces as short as possible.