6.4.3 Host Interface
The IWR1443 device communicates with the host radar processor over the following main interfaces:
- Reference Clock – Reference clock available for host processor after device wakeup
- Control – 4-port standard SPI (slave) for host control. Control UART or CAN can be used as a control interface. All radio control commands (and response) flow through this interface.
- Data – High-speed serial port following the MIPI CSI2 format (LVDS format can also be used). Four data and one clock lane (all differential). Data from different receive channels can be multiplexed on a single data lane to optimize board routing. This is a unidirectional interface used for data transfer only.
- Reset – Active-low reset for device wakeup from host
- Out-of-band interrupt
- Error – Used for notifying the host in case the radio controller detects a fault