SNOSDC0A October   2020  – December 2020 LM7310


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8.     14
    9. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Reverse Polarity Protection
      2. 7.3.2 Undervoltage Protection (UVLO & UVP)
      3. 7.3.3 Overvoltage Lockout (OVLO)
      4. 7.3.4 Inrush Current control and Fast-trip
        1. Slew Rate (dVdt) and Inrush Current Control
        2. Fast-Trip During Steady State
      5. 7.3.5 Analog Load Current Monitor Output
      6. 7.3.6 Reverse Current Protection
      7. 7.3.7 Overtemperature Protection (OTP)
      8. 7.3.8 Fault Response
      9. 7.3.9 Power Good Indication (PG)
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
      1. 8.2.1 Typical Application
        1. Design Requirements
        2. Detailed Design Procedure
          1. Setting Undervoltage and Overvoltage Thresholds
          2. Setting Output Voltage Rise Time (tR)
          3. Setting Power Good Assertion Threshold
          4. Setting Analog Current Monitor Voltage (IMON) Range
        3. Application Curves
    3. 8.3 Active ORing
    4. 8.4 Priority Power MUXing
    5. 8.5 USB PD Port Protection
    6. 8.6 Parallel Operation
  9. Power Supply Recommendations
    1. 9.1 Transient Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

USB PD Port Protection

End equipments like PC, Notebooks, Docking Stations, Monitors etc. have USB PD ports which can be configured as DFP (Source), UFP (Sink) or DRP (Source+Sink). LM73100 can be used independently or in conjunction with TPS259470x to handle the power path protection requirements of USB PD ports as shown in Figure 8-11 below.

LM73100 provides overvoltage protection on the sink path, while blocking reverse current from internal sink rail to the port.

TPS259470x provides overcurrent & short-circuit protection in the source path, while blocking any reverse current from the port to the internal source power rail. The fast recovery from reverse current blocking ensures minimum supply droop during Fast Role Swap (FRS) events. The PD controller can also use the OVLO pin as an active low enable signal to control the power path. Holding the OVLO pin high keeps the device in OFF state in sink mode and blocks current in both directions. Once the PD controller determines the need to start sourcing power, it can pull the OVLO pin low to trigger a fast recovery from OFF to ON state, meeting the FRS timing requirements.

GUID-20201214-CA0I-GFWD-10DS-J22T6VLBQHVP-low.gif Figure 8-11 USB PD Port Protection

The linear ORing mechanism in TPS259470x & LM73100 ensures that there's no reverse current flowing from one power source to the other during fast or slow ramp of either supply.

The following waveforms illustrate the LM73100 reverse current blocking behavior in USB applications.

GUID-20201207-CA0I-WDB4-GVRG-ZT4V3KH1QG5X-low.pngFigure 8-12 LM73100 Reverse Current Protection During 20-V Hot-Plug at Output
GUID-20201207-CA0I-TN07-GMSN-LTXVXXQJRNDZ-low.pngFigure 8-13 LM73100 Reverse Current Protection During 20-V Voltage Ramp at Output