SNOSDE8A July   2023  – September 2023 LM74912-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump
      2. 8.3.2 Dual Gate Control (DGATE, HGATE)
        1. 8.3.2.1 Reverse Battery Protection (A, C, DGATE)
        2. 8.3.2.2 Load Disconnect Switch Control (HGATE, OUT)
      3. 8.3.3 Short Circuit Protection (CS+, CS-, ISCP)
      4. 8.3.4 Overvoltage Protection and Battery Voltage Sensing (SW, OV, UVLO)
      5. 8.3.5 Low IQ SLEEP Mode (SLEEP, SLEEP_OV)
    4. 8.4 Device Functional Modes
  10. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12-V Battery Protection
      2. 9.2.2 Automotive Reverse Battery Protection
        1. 9.2.2.1 Input Transient Protection: ISO 7637-2 Pulse 1
        2. 9.2.2.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
        3. 9.2.2.3 Input Micro-Short Protection: LV124 E-10
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Design Considerations
        2. 9.2.3.2 Charge Pump Capacitance VCAP
        3. 9.2.3.3 Input , Supply and Output Capacitance
        4. 9.2.3.4 Hold-Up Capacitance
        5. 9.2.3.5 Overvoltage Protection and Battery Monitor
        6. 9.2.3.6 Selecting Short Circuit Current Threshold
          1. 9.2.3.6.1 Selection of Scaling Resistor RSET and RISCP for Short Circuit Protection
      4. 9.2.4 MOSFET Selection: Blocking MOSFET Q1
      5. 9.2.5 MOSFET Selection: Hot-Swap MOSFET Q2
      6. 9.2.6 TVS Selection
      7. 9.2.7 Application Curves
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
      2. 9.4.2 TVS Selection for 12-V Battery Systems
      3. 9.4.3 TVS Selection for 24-V Battery Systems
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.5 Low IQ SLEEP Mode (SLEEP, SLEEP_OV)

LM74912-Q1 supports low IQ SLEEP mode operation. This mode can be enabled by pulling SLEEP pin low (EN = High). In SLEEP mode, device turns off internal charge pump, SW switch and disables DGATE and HGATE drive thus achieving low current consumption of 5.5-μA typical. However at the same time device power up always on loads connected on OUT pin through an internal low power MOSFET with typical on resistance of 7 Ω. In this mode device can support peak load current of 100 mA. As load is increased, voltage drop across internal MOSFET increases. Device offers overcurrent protection during sleep mode with typical overcurrent threshold of 250 mA. In case of overcurrent event during sleep mode, device protects internal FET by disconnecting the internal MOSFET switch and latching off the device. As an additional layer of protection, device also features thermal shutdown with latch off feature in SLEEP mode in case of any overheating of the device in SLEEP mode. To put the device out of the latch mode user has to toggle the SLEEP or EN pin.

In SLEEP mode LM74912-Q1 offers protection against input overvoltage events. Device can be configured in either overvoltage cut-off (SLEEP_OV connected to C) or overvoltage clamp mode (SLEEP_OV connected to VOUT) with default overvoltage threshold of 21-V typical.

If SLEEP mode feature is not required then SLEEP pin should be tied to EN. When not used SLEEP_OV pin can be left floating.

GUID-20220418-SS0I-GXBT-9BMN-P3QWJ2FPQM3X-low.svgFigure 8-6 LM74912-Q1 SLEEP Mode

A higher overvoltage threshold for SLEEP mode can be achieved by adding an external Zener diode between SLEEP_OV pin to OUT/C as shown in Figure 8-7. This feature is useful while configuring overvoltage threshold for 24-V or 48-V powered systems.

GUID-20230630-SS0I-W4M7-2M0Q-MPXC6KN1TBBZ-low.svgFigure 8-7 Extending Overvoltage Threshold in SLEEP Mode