SBOSAL2 September   1999  – January 2025 LMC7101

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics for VS = ±1.35V or 2.7V
    6. 5.6  Electrical Characteristics for VS = ±1.5V or 3V
    7. 5.7  Electrical Characteristics for VS = ±2.5V or 5V
    8. 5.8  Electrical Characteristics for VS = ±7.5V or 15V
    9. 5.9  Typical Characteristics for VS = 2.7V
    10. 5.10 Typical Characteristics for VS = 3V
    11. 5.11 Typical Characteristics for VS = 5V
    12. 5.12 Typical Characteristics for VS = 15V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Benefits of the LMC7101 Tiny Amplifier
        1. 6.3.1.1 Size
        2. 6.3.1.2 Height
        3. 6.3.1.3 Signal Integrity
        4. 6.3.1.4 Simplified Board Layout
        5. 6.3.1.5 Low THD
        6. 6.3.1.6 Low Supply Current
        7. 6.3.1.7 Wide Voltage Range
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input Common Mode
        1. 6.4.1.1 Input Common-Mode Voltage Range
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Rail-to-Rail Output
      2. 7.1.2 Capacitive Load Tolerance
      3. 7.1.3 Compensating for Input Capacitance When Using Large Value Feedback Resistors
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Electrical Characteristics for VS = ±7.5V or 15V

at TJ = 25°C, V+ = 15V, V– = 0V, VCM = VOUT = V+ / 2, and RL = 1MΩ connected to V+ / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage ±0.26 mV
dVOS/dT Input offset voltage drift TJ = –40°C to +85°C 1 µV/°C
PSRR Power-supply rejection ratio Positive
V+ = 5V to 15V
V– = 0V, VOUT = 1.5V
 		 LMC7101A 70 82 dB
LMC7101B 65 82
LMC7101A
TJ = –40°C to +85°C		 65 82
LMC7101B
TJ = –40°C to +85°C		 60 82
Negative
V+ = –5V to –15V
V– = 0V, VOUT = –1.5V
 		 LMC7101A 70 82
LMC7101B 65 82
LMC7101A
TJ = –40°C to +85°C		 65 82
LMC7101B
TJ = –40°C to +85°C		 62 82
INPUT BIAS CURRENT
IB Input bias current ±1 pA
TJ = –40°C to +85°C ±64
IOS Input offset current ±0.5 pA
TJ = –40°C to +85°C ±32
NOISE
en Input voltage noise density f = 1kHz, VCM = 1V 37 nV/√Hz
in Input current noise density f = 1kHz 6.8 fA/√Hz
THD Total harmonic distortion f = 10kHz, G = – 2V/V, RL = 10kΩ, VOUT = 8.5Vpp 0.01 %
INPUT VOLTAGE
VCM Input common-mode voltage To positive rail
CMRR > 50dB		 15.2 15.3 V
TJ = –40°C to +85°C 15 15.3
To negative rail
CMRR > 50dB		 –0.3 –0.2
TJ = –40°C to +85°C –0.3 0
CMRR Common-mode rejection ratio 0V ≤ VCM  ≤15V 62 82 dB
TJ = –40°C to +85°C  60 82
INPUT IMPEDANCE
RIN Input resistance > 1 TΩ
CIN Input capacitance 3 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain  Sourcing
7.5V < VO < 12.5V, VCM = 1.5V
RL = 2kΩ to 7.5V		 80 340 V/mV
TJ = –40°C to +85°C 40 340
Sinking
2.5V < VO < 7.5V, VCM = 1.5V
RL = 2kΩ to 7.5V		 15 24
TJ = –40°C to +85°C 10 24
Sourcing, VCM = 1.5V, 7.5V < VO < 12.5V, RL = 600Ω 34 300
Sinking, VCM = 1.5V, 2.5V < VO < 7.5V, RL = 600Ω 6 15
FREQUENCY RESPONSE
GBW Gain bandwidth product 1.1 MHz
SR Slew rate(1) VS = 15V, 10V step,
RL = 100kΩ to 7.5V
VOUT = 10VPP, f = 1kHz		 0.5 1.1 V/µs
TJ = –40°C to +85°C 0.4 1.1
θm Phase margin 45 °
Gm Gain margin 10 dB
OUTPUT
VO Voltage output swing Positive rail
RL = 2kΩ		 14.4 14.7 V
TJ = –40°C to +85°C 14.2 14.7
Negative rail
RL = 2kΩ		 0.16 0.32
TJ = –40°C to +85°C 0.16 0.45
Positive rail
RL = 600Ω		 13.4 14.1
TJ = –40°C to +85°C 13 14.1
Negative rail
RL = 600Ω		 0.5 1
TJ = –40°C to +85°C 0.5 1.3
ISC Short-circuit current(2) Sourcing
VOUT = 0V		 30 50 mA
TJ = –40°C to +85°C 20 50
Sinking
VOUT = 12V		 30 50
TJ = –40°C to +85°C 20 50
POWER SUPPLY
IQ Quiescent current per amplifier 0.8 1.5 mA
TJ = –40°C to +85°C 0.8 1.71
(1) Number specified is the slower of the positive and negative slew rates.
(2) Do not short circuit output to V+ when V+ is greater than 12V or reliability can be adversely affected.