SBOSAL2 September   1999  – January 2025 LMC7101

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics for VS = ±1.35V or 2.7V
    6. 5.6  Electrical Characteristics for VS = ±1.5V or 3V
    7. 5.7  Electrical Characteristics for VS = ±2.5V or 5V
    8. 5.8  Electrical Characteristics for VS = ±7.5V or 15V
    9. 5.9  Typical Characteristics for VS = 2.7V
    10. 5.10 Typical Characteristics for VS = 3V
    11. 5.11 Typical Characteristics for VS = 5V
    12. 5.12 Typical Characteristics for VS = 15V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Benefits of the LMC7101 Tiny Amplifier
        1. 6.3.1.1 Size
        2. 6.3.1.2 Height
        3. 6.3.1.3 Signal Integrity
        4. 6.3.1.4 Simplified Board Layout
        5. 6.3.1.5 Low THD
        6. 6.3.1.6 Low Supply Current
        7. 6.3.1.7 Wide Voltage Range
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input Common Mode
        1. 6.4.1.1 Input Common-Mode Voltage Range
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Rail-to-Rail Output
      2. 7.1.2 Capacitive Load Tolerance
      3. 7.1.3 Compensating for Input Capacitance When Using Large Value Feedback Resistors
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics for VS = ±1.35V or 2.7V

at TJ = 25°C, V+ = 2.7V, V– = 0V, VCM = VOUT = V+ / 2, and RL > 1MΩ connected to V+ / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage  LMC7101A ±0.11 ±6 mV
LMC7101B ±0.11 ±9
dVOS/dT Input offset voltage drift TJ = –40°C to +85°C  1 µV/°C
PSRR Power-supply rejection ratio  V+ = 1.35V to 1.65V, V– = –1.35V to –1.65V, VCM = 0V 45 60 dB
INPUT BIAS CURRENT
IB Input bias current TJ = –40°C to +85°C ±1 ±64 pA
IOS Input offset current TJ = –40°C to +85°C ±0.5 ±32 pA
INPUT VOLTAGE
VCM Input common-mode voltage For CMRR ≥ 47dB  Positive 2.7 3 V
Negative 0 0
CMRR Common-mode rejection 0V ≤ VCM ≤ 2.7V  47 70 dB
INPUT IMPEDANCE
RIN Input resistance > 1 TΩ
CIN Common-mode input capacitance 3 pF
FREQUENCY RESPONSE
GBW Gain bandwidth product 0.6 MHz
SR Slew rate(1) (V+) = 15V, 10V step, RL = 100kΩ to 7.5V, VOUT = 10VPP, f = 1kHz  0.7 V/µs
OUTPUT
VO Voltage output swing Positive rail RL = 2kΩ 2.15 2.45 V
RL = 10kΩ 2.64 2.68
Negative rail RL = 2kΩ 0.25 0.5
RL = 10kΩ 0.025 0.06
POWER SUPPLY
IQ Quiescent current per amplifier 500 810 µA
TJ = –40°C to +85°C 500 950
(1) Number specified is the slower of the positive and negative slew rates.