SNAS579G March 2012 – December 2014 LMK00105
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
Clock input selection is controlled using the SEL pin as shown in Table 1. Refer to Clock Inputs for clock input requirements. When CLKin is selected, the crystal circuit is powered down. When OSCin is selected, the crystal oscillator will start-up and its clock will be distributed to all outputs. Refer to Crystal Interface for more information. Alternatively, OSCin may be driven by a single ended clock, up to 200 MHz, instead of a crystal.
SEL | Input |
---|---|
0 | CLKin, CLKin* |
1 | OSCin (Crystal Mode) |