SNAS826 April   2022 LMK6C

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 LMK6P/D Thermal Information
    5. 7.5 LMK6C Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Timing Diagrams
  8. Parameter Measurement Information
    1. 8.1 Device Output Configurations
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bulk Acoustic Wave (BAW)
      2. 9.3.2 Device Block-Level Description
      3. 9.3.3 Function Pin(s)
      4. 9.3.4 Clock Output Interfacing and Termination
      5. 9.3.5 Temperature Stability
      6. 9.3.6 Mechanical Robustness
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ensuring Thermal Reliability
      2. 12.1.2 Best Practices for Signal Integrity
      3. 12.1.3 Recommended Solder Reflow Profile
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Device Nomenclature
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Packaging Information
    2. 14.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • DLF|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information

LMK6C Thermal Information

THERMAL METRIC(1) LMK6C UNIT
DLE (VSON) DLF (VSON)
4 PINS 4 PINS
RθJA Junction-to-ambient thermal resistance 124.8 128.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 61.2 73.2 °C/W
RθJB Junction-to-board thermal resistance 42.5 39.8 °C/W
ΨJT Junction-to-top characterization parameter 2.8 2.4 °C/W
ΨJB Junction-to-board characterization parameter 42.3 39.5 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.