SBOS410O June   2007  – October 2025 REF50 , REF50E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics REF50xxI and REF50xxAI
    6. 6.6 Electrical Characteristics REF50xxEI
    7. 6.7 Typical Characteristics: REF50xxI, REF50xxAI
    8. 6.8 Typical Characteristics: REF50xxEI
  8. 7 Parameter Measurement Information
    1. 7.1 Solder Heat Shift
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Temperature Monitoring
      2. 8.3.2 Temperature Drift
      3. 8.3.3 Thermal Hysteresis
      4. 8.3.4 Noise Performance
      5. 8.3.5 Long-Term Stability
      6. 8.3.6 Output Adjustment Using the TRIM/NR Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 Basic Connections
      2. 8.4.2 Supply Voltage
      3. 8.4.3 Negative Reference Voltage
  10. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 16-bit, 250KSPS Data Acquisition System
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 REF50xxI, REF50xxAI Layout Guidelines
        2. 9.4.1.2 REF50xxEI Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) REF50xxEI REF50xxI , REF50xxAI UNIT
D (SOIC) D (SOIC) DGK (VSSOP)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 120 115 160.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 52 63.4 53.9 °C/W
RθJB Junction-to-board thermal resistance 66 57.1 82.9 °C/W
ΨJT Junction-to-top characterization parameter 9.8 15.4 5.1 °C/W
ΨJB Junction-to-board characterization parameter 64.7 56.2 80.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.