Place the protection and filtering circuitry close to the bus connector to prevent transients, ESD and noise from propagating onto the board. In this layout example a transient voltage suppression (TVS) device, D1, has been shown as added protection. The production solution can be either bi-directional TVS diode or varistor with ratings matching the application requirements. This example also shows optional bus filter capacitors C6 and C8. Additionally (not shown) a series common mode choke (CMC) can be placed on the CANH and CANL lines between the TCAN1043xx-Q1 transceiver and the connector.
Design the bus protection components in the direction of the signal path. Do not force the transient current to divert from the signal path to reach the protection device.
Use supply (VCC) and ground planes to provide low inductance as high-frequency current will follow the path of least impedance and not the path of least resistance.
Use at least two vias for supply (VCC, VIO, VSUP) and ground connections of bypass capacitors and protection devices to minimize trace and via inductance.
Bypass and bulk capacitors should be placed as close as possible to the supply terminals of transceiver, examples are C4 on the VCC supply net, C5 on the VIO supply net and C9 on the VSUP supply net.
Bus termination: this layout example shows split termination. This is where the termination is split into two resistors, R6 and R7, with the center or split tap of the termination connected to ground via capacitor C7. Split termination provides common mode filtering for the bus. When bus termination is placed on the board instead of directly on the bus, additional care must be taken to ensure the terminating node is not removed from the bus thus also removing the termination. See the application section for information on power ratings needed for the termination resistor(s).
To limit current of digital lines, series resistors may be used as in R2, R3 and R5 but are not required.
Terminal 1: R1 is shown optionally for the TXD input of the device. If an open drain host processor is used, this is mandatory to ensure the bit timing into the device is met.
Terminal 9: SW1 is oriented in a low-side configuration which is used to implement a local WAKE event. The series resistor R10 is needed for protection against over current conditions as it limits the current into the WAKE pin when the ECU has lost its ground connection. The pull-up resistor R9 is required to provide sufficient current during stimulation of a WAKE event. See the application section for more information on calculating both the R9 and R10 values.
Terminal 14: Is shown assuming the mode terminal, nSTB, is used. If the device is only be used in normal mode, R5 is not needed and R4 could be used for the pull-up resistor to VIO