SLLSEV0E November   2017  – March 2021 TCAN1043-Q1 , TCAN1043G-Q1 , TCAN1043H-Q1 , TCAN1043HG-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings IEC Specification
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Dissipation Ratings
    7. 7.7 Electrical Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Internal and External Indicator Flags (nFAULT and RXD)
      2. 9.3.2 Power-Up Flag (PWRON)
      3. 9.3.3 Wake-Up Request Flag (WAKERQ)
      4. 9.3.4 Wake-Up Source Recognition Flag (WAKESR)
      5. 9.3.5 Undervoltage Fault Flags
        1. 9.3.5.1 Undervoltage on VCC Fault
        2. 9.3.5.2 Undervoltage on VIO Fault
        3. 9.3.5.3 Undervoltage on VSUP Fault
      6. 9.3.6 CAN Bus Failure Fault Flag
      7. 9.3.7 Local Faults
        1. 9.3.7.1 TXD Dominant Timeout (TXD DTO)
        2. 9.3.7.2 TXD Shorted to RXD Fault
        3. 9.3.7.3 CAN Bus Dominant Fault
        4. 9.3.7.4 Thermal Shutdown (TSD)
        5. 9.3.7.5 RXD Recessive Fault
        6. 9.3.7.6 Undervoltage Lockout (UVLO)
        7. 9.3.7.7 Unpowered Device
        8. 9.3.7.8 Floating Terminals
        9. 9.3.7.9 CAN Bus Short Circuit Current Limiting
    4. 9.4 Device Functional Modes
      1. 9.4.1 CAN Bus States
      2. 9.4.2 Normal Mode
      3. 9.4.3 Silent Mode
      4. 9.4.4 Standby Mode
      5. 9.4.5 Go-to-Sleep Mode
      6. 9.4.6 Sleep Mode with Remote Wake and Local Wake Up Requests
        1. 9.4.6.1 Remote Wake Request via Wake Up Pattern (WUP)
        2. 9.4.6.2 Local Wake Up (LWU) via WAKE Input Terminal
      7. 9.4.7 Driver and Receiver Function Tables
      8. 9.4.8 Digital Inputs and Outputs
      9. 9.4.9 INH (Inhibit) Output
  10. 10Application Information Disclaimer
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length and Number of Nodes
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 CAN Termination
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout
      1. 12.1.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • DMT|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

INH (Inhibit) Output

The inhibit output terminal is used to control system power management devices allowing for extremely low system current consumption in sleep mode. This terminal can be used to enable and disable local power supplies. The pin has two states: driven high and high impedance (High Z).

When high (on), the terminal shows VSUP minus a diode voltage drop. In the high impedance state, the output is left floating. The INH pin is high for normal, silent, Go-to-Sleep, and standby modes. It is low when in sleep mode.

Note:

This terminal should be considered a “high voltage logic” terminal, not a power output thus should be used to drive the EN terminal of the system’s power management device and not used as a switch for the power management supply itself. This terminal is not reverse battery protected and thus should not be connected outside the system module.