The TMF0064 uses three address registers: TA1, TA2, and E/S (Figure 6-2, Figure 6-3, and Figure 6-4).

The registers TA1 and TA2 are loaded with the target address where the data is written and read. Register E/S is a read-only transfer status register used to verify data integrity with write commands. During a Write Scratchpad command, the E/S bits E[4:0] initially load with the incoming T[4:0] and then increment on each incoming subsequent data byte. Thus, E[4:0] is the ending offset counter within the 32-byte scratchpad. The PF bit of the E/S register is a partial byte flag and sets when the received byte is partial (data bits not an integer multiple of 8) or if the scratchpad data is invalid due to a loss of power.

The PF bit clears when there is a successful scratchpad write. The authorization accepted (AA) bit of the E/S register sets when there is an authorization match during a Copy Scratchpad command. If AA=1 and PF=0, the indication is the data the scratchpad stores is already copied to the target memory. The AA flag clears whenever data is written into the scratchpad. The AA flag is valid only if the PF flag is 0.