SLVSJQ6A September   2025  – June 2026 TMF0064

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Functional Tests
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 64768-Bit FRAM
      2. 6.3.2 FRAM Status Memory
      3. 6.3.3 Address Registers and Transfer Status
      4. 6.3.4 Writing Data to the FRAM
      5. 6.3.5 TMF0064 Device ID
      6. 6.3.6 Bus Termination
    4. 6.4 Device Functional Modes
      1. 6.4.1 Test Procedures for Functional Tests
        1. 6.4.1.1 Multiple Target Configurations
    5. 6.5 Programming
      1. 6.5.1 Serial Communication
      2. 6.5.2 Initialization
      3. 6.5.3 ROM Commands
        1. 6.5.3.1 READ ROM Command [33h]
        2. 6.5.3.2 MATCH ROM Command [55h]
        3. 6.5.3.3 SKIP ROM Command [CCh]
        4. 6.5.3.4 SEARCH ROM Command [F0h]
        5. 6.5.3.5 RESUME Command [A5h]
        6. 6.5.3.6 OVERDRIVE SKIP ROM Command [3Ch]
        7. 6.5.3.7 OVERDRIVE MATCH ROM Command [69h]
      4. 6.5.4 Memory Function Commands
        1. 6.5.4.1 Write Scratchpad Command [0Fh]
        2. 6.5.4.2 Read Scratchpad Command [AAh]
        3. 6.5.4.3 Copy Scratchpad [55h]
        4. 6.5.4.4 Read Memory [F0h]
        5. 6.5.4.5 Extended Read Memory [A5h]
        6. 6.5.4.6 Memory Command Flow Charts
      5. 6.5.5 SDQ Signaling
        1. 6.5.5.1 RESET and PRESENCE PULSE
        2. 6.5.5.2 Write-Read-Time Slots
      6. 6.5.6 IDLE
      7. 6.5.7 CRC Generation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Packaging Information
    2. 10.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5.4.5 Extended Read Memory [A5h]

The Extended Read Memory command works similar to the Read Memory command, except for the 2-byte CRC that is transmitted at the end of each memory page. The host reads the FRAM memory by issuing the Extended Read Memory command (A5h), followed by the 2-byte address. If the host issues an address greater than 1FC5h, the device sets the six most significant address bits to zero. The host then reads the data from either the address within the address range or the modified address until the end of a 32-byte page. At the end of the memory page, the host reads the 2-byte inverted CRC. If the host continues to read, the host receives the data corresponding to the beginning of next page and so on until reaching the end address 1FC4h. If the host continues to read further, the TMF0064 transmits 1s. The host terminates the Read Memory command sequence by issuing a reset pulse.