SPRSP45B March 2020 – December 2020 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
PRODUCTION DATA
SIGNAL NAME | PIN TYPE | DESCRIPTION | GPIO | 80 QFP | 64 QFP | 48 QFP |
---|---|---|---|---|---|---|
VDD | 1.2-V Digital Logic Power Pins. TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 10 µF. It is also recommended that all VDD pins be externally connected to each other. | 31, 53, 71, 8 | 27, 4, 44, 59 | 36, 45 | ||
VDDA | 3.3-V Analog Power Pins. Place a minimum 2.2-µF decoupling capacitor on each pin. | 26 | 22 | 18 | ||
VDDIO | 3.3-V Digital I/O Power Pins. Place a minimum 0.1-µF decoupling capacitor on each pin. It's recommended to place an additional bulk cap of around 20uF shared by all the pins. However, the exact value of this bulk cap will depend on the regulator being used. | 32, 52, 7, 72 | 28, 43, 60 | 35, 46 | ||
VSS | Digital Ground | 30, 55, 70, 9 | 26, 45, 5, 58 | 22, 37, 44 | ||
VSSA | Analog Ground | 25 | 21 | 17 |