SCDS457A may   2023  – june 2023 TMUX4827

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Source or Drain Continuous Current
    6. 6.6 Source or Drain RMS Current
    7. 6.7 Electrical Characteristics 
    8. 6.8 Switching Characteristics 
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  On-Leakage Current
    3. 7.3  Off-Leakage Current
    4. 7.4  Power-Off Leakage Current
    5. 7.5  Propagation Delay
    6. 7.6  tON (VDD) and tOFF (VDD) Time
    7. 7.7  Transition Time
    8. 7.8  Break-Before-Make
    9. 7.9  THD + Noise
    10. 7.10 Power Supply Rejection Ratio (PSRR)
    11. 7.11 Charge Injection
    12. 7.12 Bandwidth
    13. 7.13 Off Isolation
    14. 7.14 Crosstalk
  9. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
    3. 8.3 Feature Description
      1. 8.3.1 Beyond the Supply
      2. 8.3.2 Bidirectional Operation
      3. 8.3.3 Over Temperature Protection
      4. 8.3.4 Power-Off Protection
      5. 8.3.5 1.8 V Logic Compatible Inputs
      6. 8.3.6 Fail-Safe Logic
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Audio Amplifier Switching
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Option Addendum
    2. 11.2 Tape and Reel Information
    3. 11.3 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBH|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Electrical Characteristics 

Over operating free-air temperature range (unless otherwise noted)
Typical at VDD = 3.3 V TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ANALOG SWITCH
RON On-resistance VDD = 2.5 V to 5.5 V
VS = –12 V to +12 V
ID = –100 mA		 25°C 0.13 0.16 Ω
–40°C to +85°C 0.225 Ω
–40°C to +125°C 0.250 Ω
RON On-resistance VDD = 1.8 V to 2.5 V
VS = –12 V to +12 V
ID = –100 mA		 25°C 0.19 0.22 Ω
–40°C to +85°C 0.25 Ω
–40°C to +125°C 0.3 Ω
ΔRON On-resistance mismatch between channels VDD = 2.5 V to 5.5 V
VS = –12 V to +12 V
ID = –100 mA		 25°C 0.002 0.03 Ω
–40°C to +85°C 0.03 Ω
–40°C to +125°C 0.05 Ω
ΔRON On-resistance mismatch between channels VDD = 1.8 V to 2.5 V
VS = –12 V to +12 V
ID = –100 mA		 25°C 0.003 0.035 Ω
–40°C to +85°C 0.04 Ω
–40°C to +125°C 0.06 Ω
RON FLAT On-resistance flatness VDD = 2.5 V to 5.5 V
VS = –12 V to +12 V
ID = –100 mA		 25°C 0.001 0.01 Ω
–40°C to +85°C 0.05 Ω
–40°C to +125°C 0.07 Ω
RON FLAT On-resistance flatness VDD = 1.8 V to 2.5 V
VS = –12 V to +12 V
ID = –100 mA		 25°C 0.003 0.015 Ω
–40°C to +85°C 0.07 Ω
–40°C to +125°C 0.09 Ω
RON DRIFT On-resistance drift VS = 0 V, IS = –100 mA –40°C to +125°C 0.001 Ω/°C
IS(OFF) Source off leakage current(1) Switch state is off
VS = ±12 V / 0 V
VD = 0 V / ±12 V		 25°C 0.02 µA
–40°C to +85°C -0.1 0.1 µA
–40°C to +125°C -1 1 µA
IS(ON)
ID(ON)		 Channel on leakage current(2) Switch state is on
VS = VD = ±12 V		 25°C 0.02 µA
–40°C to +85°C -0.1 0.1 µA
–40°C to +125°C -1 1 µA
IS(POFF) Source powered-off leakage current(1) VDD = 0 V
VS = ±12 V / 0 V
VD = 0 V / ± 12 V		 25°C 0.02 µA
–40°C to +85°C -0.1 0.1 µA
–40°C to +125°C -2 2 µA
ID(POFF) Drain powered-off leakage current(1) VDD = 0 V
VS = ±12 V / 0 V
VD = 0 V / ± 12 V		 25°C 0.02 µA
–40°C to +85°C -0.1 0.1 µA
–40°C to +125°C -2 2 µA
LOGIC INPUTS (SEL / EN pins)
VIH Logic voltage high –40°C to +125°C 1.1 5.5 V
VIL Logic voltage low –40°C to +125°C 0 0.6 V
IIH Input leakage current –40°C to +125°C 1 80 nA
IIL Input leakage current –40°C to +125°C -10 -1 nA
CIN Logic input capacitance –40°C to +125°C 5 pF
POWER SUPPLY
IDD VDD supply current Logic inputs = 0 V, 5 V, or VDD 25°C 55 125 µA
–40°C to +85°C 130 µA
–40°C to +125°C 140 µA
(1) When VS is at a voltage potential, VD is 0 V, or when VS is 0 V, VD is at a voltage potential.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.