SLVSDV8 July 2017 TPS54424
The TPS54424 requires input decoupling ceramic capacitors type X5R, X7R or similar from VIN to PGND placed as close as possible to the IC. A total of at least 4.7 μF of capacitance is required and some applications may require a bulk capacitance. At least 1 µF of bypass capacitance is recommended near both VIN pins to minimize the input voltage ripple. A 0.1 µF to 1 µF capacitor must be placed by both VIN pins 2 and 11 to provide high frequency bypass to reduce the high frequency overshoot and ringing on VIN and SW pins. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum RMS input current of the TPS54424. The RMS input current can be calculated using Equation 22.
For this example design, a ceramic capacitor with at least a 25 V voltage rating is required to support the maximum input voltage. Two 10 µF 1206 X5R 25 V and two 0.1 μF 0603 X7R 25 V capacitors in parallel has been selected to be placed on both sides of the IC near both VIN pins to PGND pins. Based on the capacitor manufacturer's website, the total ceramic input capacitance derates to 7.6 µF at the nominal input voltage of 12 V. A 100 µF bulk capacitance is also used in this circuit to bypass long leads when connected a lab bench top power supply.
The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 23. The maximum input ripple occurs when operating nearest to 50% duty cycle. Using the nominal design example values of Ioutmax = 4 A, Cin = 7.6 μF, and fSW = 700 kHz, the input voltage ripple with the 12 V nominal input is 100 mV and the RMS input ripple current with the 4.5 V minimum input is 2.0 A.