SLVSDV8 July   2017 TPS54424

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Simplified Schematic
  3. 3 Description
    1.     Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Continuous Conduction Mode Operation (CCM)
      3. 7.3.3  VIN Pins and VIN UVLO
      4. 7.3.4  Voltage Reference and Adjusting the Output Voltage
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Enable and Adjustable UVLO
      7. 7.3.7  Soft Start and Tracking
      8. 7.3.8  Safe Start-up into Pre-Biased Outputs
      9. 7.3.9  Power Good
      10. 7.3.10 Sequencing (SS/TRK)
      11. 7.3.11 Adjustable Switching Frequency (RT Mode)
      12. 7.3.12 Synchronization (CLK Mode)
      13. 7.3.13 Bootstrap Voltage and 100% Duty Cycle Operation (BOOT)
      14. 7.3.14 Output Overvoltage Protection (OVP)
      15. 7.3.15 Overcurrent Protection
        1. 7.3.15.1 High-side MOSFET Overcurrent Protection
        2. 7.3.15.2 Low-side MOSFET Overcurrent Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Input Capacitor
        6. 8.2.2.6  Output Voltage Resistors Selection
        7. 8.2.2.7  Soft-start Capacitor Selection
        8. 8.2.2.8  Undervoltage Lockout Set Point
        9. 8.2.2.9  Bootstrap Capacitor Selection
        10. 8.2.2.10 PGOOD Pull-up Resistor
        11. 8.2.2.11 Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Alternate Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Document Support
      1. 11.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RNV|18
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Typical Characteristics

TPS54424 D002_Efficiency5Vout.gif
VOUT = 5 V fSW = 800 kHz TA = 25 °C
WE 744311220 L = 2.2 µH DCR = 11.4 mΩ
Figure 1. Efficiency for 5 V Output
TPS54424 D004_Efficiency2V5out.gif
VOUT = 2.5 V fSW = 700 kHz TA = 25 °C
WE 744311220 L = 2.2 µH DCR = 11.4 mΩ
Figure 3. Efficiency for 2.5 V Output
TPS54424 D007_Efficiency1V2out.gif
VOUT = 1.2 V fSW = 600 kHz TA = 25 °C
WE 74438357012 L = 1.2 µH DCR = 13.4 mΩ
Figure 5. Efficiency for 1.2 V Output
TPS54424 D005_slvsdc9.gif
V(EN) = 5 V V(FB) = 0.8 V
Figure 7. VIN Pin Nonswitching Supply Current vs Junction Temperature
TPS54424 D007_slvsdc9.gif
Figure 9. EN Pin Voltage Threshold vs Junction Temperature
TPS54424 D009_slvsdc9.gif
Figure 11. Regulated FB Voltage vs Junction Temperature
TPS54424 D011_slvsdc9.gif
Figure 13. Error Amplifier Transconductance vs Junction Temperature
TPS54424 D013_slvsdc9.gif
Figure 15. SS/TRK Current vs Junction Temperature
TPS54424 D022_slvsdc9.gif
Figure 17. FB voltage vs SS/TRK Voltage
TPS54424 D016_slvsdc9.gif
Figure 19. PGOOD Thresholds vs Junction Temperature
TPS54424 D011_tonmin.gif
VIN = 12 V L = 1.5 µH
Figure 21. Minimum on-time vs Ambient Temperature
TPS54424 D021_slvsdc9.gif
R(RT/CLK) = 30.1 kΩ
Figure 23. Switching Frequency vs Junction Temperature (1600 kHz)
TPS54424 D024_slvsdc9.gif
Figure 25. Switching Frequency vs RT/CLK Resistor (High Range)
TPS54424 D003_Efficiency3V3out.gif
VOUT = 3.3 V fSW = 700 kHz TA = 25 °C
WE 744311220 L = 2.2 µH DCR = 11.4 mΩ
Figure 2. Efficiency for 3.3 V Output
TPS54424 D006_Efficiency1V5out.gif
VOUT = 1.5 V fSW = 700 kHz TA = 25 °C
WE 74438357018 L = 1.8 µH DCR = 18 mΩ
Figure 4. Efficiency for 1.5 V Output
TPS54424 D008_Efficiency1V0out.gif
VOUT = 1.0 V TA = 25 °C TA = 25 °C
WE 74438357012 L = 1.2 µH DCR = 13.4 mΩ
Figure 6. Efficiency for 1.0 V Output
TPS54424 D006_slvsdc9.gif
V(EN) = 0.4 V
Figure 8. VIN Pin Shutdown Current vs Junction Temperature
TPS54424 D008_slvsdc9.gif
Figure 10. EN Pin Current vs Junction Temperature
TPS54424 D010_slvsdc9.gif
Figure 12. MOSFET Rds(on) vs Junction Temperature
TPS54424 D009_gmps.gif
Figure 14. COMP to SW Transconductance vs Junction Temperature
TPS54424 D014_slvsdc9.gif
V(SS/TRK) = 0.4 V
Figure 16. SS/TRK to FB Offset vs Junction Temperature
TPS54424 D010_HSOC.gif
Figure 18. High-side Peak Current Limit vs Junction Temperature
TPS54424 D017_slvsdc9.gif
V(FB) = 0.6 V V(PGOOD) = 5 V
Figure 20. PGOOD Leakage Current vs Junction Temperature
TPS54424 D020_slvsdc9.gif
R(RT/CLK) = 100 kΩ
Figure 22. Switching Frequency vs Junction Temperature (500 kHz)
TPS54424 D023_slvsdc9.gif
Figure 24. Switching Frequency vs RT/CLK Resistor (Low Range)