SGLS247C September   2011  – December 2025 TPS763-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Output Pulldown
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Device Feedback Resistors
      2. 7.1.2 Recommended Capacitor Types
        1. 7.1.2.1 Recommended Capacitors (Legacy Chip)
        2. 7.1.2.2 Recommended Capacitors (New Chip)
      3. 7.1.3 Input and Output Capacitor Requirements
        1. 7.1.3.1 Input Capacitor Requirements
        2. 7.1.3.2 Output Capacitor Requirements
      4. 7.1.4 Reverse Current
      5. 7.1.5 Feed-Forward Capacitor (CFF)
      6. 7.1.6 Power Dissipation (PD)
      7. 7.1.7 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Voltage Programming
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Power Dissipation and Junction Temperature
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Device Nomenclature
      2. 8.2.2 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.2.1 Output Voltage Programming

The output voltage of the TPS76301-Q1 adjustable regulator is programmed using an external resistor divided as shown in Figure 7-7. The output voltage is calculated using Equation 10.

Equation 10. V O = 0.995 × V R E F × 1 + R 1 R 2

where

  • VREF = 1.192V typical for legacy chip and 1.2V typical for new chip (the internal reference voltage)
  • 0.995 is a constant used to center the load regulator (1%)

Choose resistors R1 and R2 for the approximately 7μA divider current. Lower value resistors can be used, but offer no inherent advantage and waste more power. Avoid higher values as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 169kΩ to set the divider current at 7μA and then calculate R1 using Equation 11.

Equation 11. L i n e   R e g . m V = % / V × V O V l m a x - V O + 1 100 × 1000
TPS763-Q1 TPS76301-Q1 Adjustable LDO Regulator ProgrammingFigure 7-7 TPS76301-Q1 Adjustable LDO Regulator Programming
Table 7-3 Output Voltage Programming Guide
OUTPUT VOLTAGE (V) DIVIDER RESISTANCE (kΩ)(1)
R1 R2
2.5 187 169
3.3 301 169
3.6 348 169
4 402 169
5 549 169
6.45 750 169
(1) 1% values shown.