SLOSEF7 July   2025 TRF1305C1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - AC Specifications in D2D Configuration
    6. 6.6 Electrical Characteristics - AC Specifications in S2D Configuration
    7. 6.7 Electrical Characteristics - DC and Timing Specifications
    8. 6.8 Typical Characteristics: D2D Configuration
    9. 6.9 Typical Characteristics: S2D Configuration
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential RF Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC-Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305C1 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RPV|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Gain Adjustment With External Resistors in a Differential Input Configuration

The TRF1305x1 allow minor gain adjustments by configuring the input external resistive network that is part of the differential input configuration. Figure 8-5 shows the external input network that comprises of a shunt resistor, RIN_SH, and two series input resistors, RIN_SER, connected to the input pins of the amplifier.

TRF1305C1 Gain Adjustment With External
                    Resistor Network Figure 8-5 Gain Adjustment With External Resistor Network

Table 8-1 provides resistor configurations for a 100Ω differential source impedance.

Table 8-1 Resistor Table for RS = 100Ω
TRF1305C1
POWER GAIN (dB) RIN_SH (Ω) RIN_SER (Ω)
5 1000 25
4 434 30
3 288 36
2 222 42
1 184 49
0 160 57

Use external resistive attenuation network only for small gain adjustments because there is a dB-to-dB noise figure degradation with the resistive attenuators. Use an amplifier version that requires minimal attenuation for achieving the overall gain.