SLOSEF7 July 2025 TRF1305C1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| DC PERFORMANCE | |||||||
| VOD-MAX | Max differential output voltage | f = 1GHz | 4 | VPP | |||
| Slew rate | 2V VO step, dc coupled, VS+ = 2.5V, VS– = –2.5V |
25 | kV/µs | ||||
| Output differential offset voltage | ±3 | mV | |||||
| Overdrive recovery time | DC coupled, VS+ = 2.5V, VS– = –2.5V, from 2 × overdrive of each SE output to each output voltage settling to < ±50mV | 6 | ns | ||||
| COMMON-MODE | |||||||
| VICM | Input common-mode voltage | Default range(1) | VS– + 1.5 | VS– + 3.5 | V | ||
| VOCM | Output common-mode voltage | VS– + 2 | VS– + 3 | V | |||
| Output common-mode offset voltage from VOCM voltage | –20 | 20 | mV | ||||
| IMPEDANCE | |||||||
| ZIN-SE | Single-ended input impedance | S2D, at INP pin with 50Ω termination on INM pin | 45 | Ω | |||
| ZIN-DIFF | Differential input impedance | D2D, looking into the device pins | 33.3 | Ω | |||
| D2D, looking into RIN_SH, see Figure 8-3 | 76.9 | ||||||
| ZO-DIFF | Differential output impedance | Differential output impedance | 8 | Ω | |||
| POWER SUPPLY | |||||||
| IQA | Active quiescent current | 108 | mA | ||||
| IQPD | Power-down quiescent current | 14 | mA | ||||
| POWER DOWN | |||||||
| VPD_Hi | PD pin logic high | Referenced to GND, see Section 6.1 | 1.35 | V | |||
| VPD_Lo | PD pin logic low | Referenced to GND, see Section 6.1 | 0.3 | V | |||
| IPD_Bias | PD bias current (current on PD pin) | PD = high (1.8V logic) | 10.5 | 15 | µA | ||
| PD = high (3.3V logic) | 19 | 30 | |||||
| tON | Turn-on time | S2D, dc coupled, VS+ = 2.5V, VS– = –2.5V, from 50% VPD transition to 90% RF out | 25 | ns | |||
| tOFF | Turn-off time | S2D, dc coupled, VS+ = 2.5V, VS– = –2.5V, from 50% VPD transition to 10% RF out | 20 | ns | |||