SNLS696A April 2021 – May 2021 TSER953
The Serializer has a PDB input pin to ENABLE or POWER DOWN the device. This pin may be controlled by an external device, or through VDD where VDD = 1.71 V to 1.89 V. PDB should be brought high after all power supplies on the board have stabilized.
When PDB is driven low, ensure that the pin is driven to 0 V for at least 3 ms before releasing or driving high. In the case where PDB is pulled up to VDD directly, a 10-kΩ pullup resistor and a > 1-μF capacitor to ground are required.
Toggling PDB low powers down the device and resets all control registers to default. After power up, if there are any errors seen, TI recommends clearing the registers to reset the errors.
Make sure to power up the VDDDRV before or at the same time as the VDDPLL.