SNLS696A April 2021 – May 2021 TSER953
The CSI-2 input port on the TSER953 is compliant with the MIPI D-PHY v1.2 and CSI-2 v1.3 specifications. The CSI-2 interface consists of a clock and an option of one, two, or four data lanes. The clock and each of the data lanes are differential lines. The TSER953 CSI-2 input must be DC-coupled to a compatible CSI-2 transmitter. Follow the PCB layout guidelines given in Section 10.1.1.